^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2009 Advanced Micro Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2009 Red Hat Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * the rights to use, copy, modify, merge, publish, distribute, sublicense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * The above copyright notice and this permission notice shall be included in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * OTHER DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Authors: Dave Airlie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Alex Deucher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Jerome Glisse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #ifndef AVIVOD_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AVIVOD_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define D1CRTC_CONTROL 0x6080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CRTC_EN (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define D1CRTC_STATUS 0x609c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define D1CRTC_UPDATE_LOCK 0x60E8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define D2CRTC_CONTROL 0x6880
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define D2CRTC_STATUS 0x689c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define D2CRTC_UPDATE_LOCK 0x68E8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define D1VGA_CONTROL 0x0330
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DVGA_CONTROL_MODE_ENABLE (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define DVGA_CONTROL_TIMING_SELECT (1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define DVGA_CONTROL_SYNC_POLARITY_SELECT (1 << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1 << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define DVGA_CONTROL_OVERSCAN_COLOR_EN (1 << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DVGA_CONTROL_ROTATE (1 << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define D2VGA_CONTROL 0x0338
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define VGA_HDP_CONTROL 0x328
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define VGA_MEM_PAGE_SELECT_EN (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define VGA_MEMORY_DISABLE (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define VGA_RBBM_LOCK_DISABLE (1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define VGA_SOFT_RESET (1 << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define VGA_MEMORY_BASE_ADDRESS 0x0310
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define VGA_RENDER_CONTROL 0x0300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define VGA_VSTATUS_CNTL_MASK 0x00030000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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