^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2017 NXP Semiconductors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Marco Franchi <marco.franchi@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Based on Panel Simple driver by Thierry Reding <treding@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <video/display_timing.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <video/videomode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <drm/drm_crtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <drm/drm_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct seiko_panel_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) const struct drm_display_mode *modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int num_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) const struct display_timing *timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int num_timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int bpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @width: width (in millimeters) of the panel's active display area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @height: height (in millimeters) of the panel's active display area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned int height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) } size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 bus_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u32 bus_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct seiko_panel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct drm_panel base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) bool prepared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bool enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) const struct seiko_panel_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct regulator *dvdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct regulator *avdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static inline struct seiko_panel *to_seiko_panel(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return container_of(panel, struct seiko_panel, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int seiko_panel_get_fixed_modes(struct seiko_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int i, num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (!panel->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) for (i = 0; i < panel->desc->num_timings; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) const struct display_timing *dt = &panel->desc->timings[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct videomode vm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) videomode_from_timing(dt, &vm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) mode = drm_mode_create(connector->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dev_err(panel->base.dev, "failed to add mode %ux%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) dt->hactive.typ, dt->vactive.typ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) drm_display_mode_from_videomode(&vm, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) mode->type |= DRM_MODE_TYPE_DRIVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (panel->desc->num_timings == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) mode->type |= DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) num++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) for (i = 0; i < panel->desc->num_modes; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) const struct drm_display_mode *m = &panel->desc->modes[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) mode = drm_mode_duplicate(connector->dev, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) m->hdisplay, m->vdisplay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) drm_mode_vrefresh(m));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) mode->type |= DRM_MODE_TYPE_DRIVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (panel->desc->num_modes == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) mode->type |= DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) num++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) connector->display_info.bpc = panel->desc->bpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) connector->display_info.width_mm = panel->desc->size.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) connector->display_info.height_mm = panel->desc->size.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (panel->desc->bus_format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) drm_display_info_set_bus_formats(&connector->display_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) &panel->desc->bus_format, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) connector->display_info.bus_flags = panel->desc->bus_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int seiko_panel_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct seiko_panel *p = to_seiko_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!p->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) p->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int seiko_panel_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct seiko_panel *p = to_seiko_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (!p->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) regulator_disable(p->avdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* Add a 100ms delay as per the panel datasheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) regulator_disable(p->dvdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) p->prepared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int seiko_panel_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct seiko_panel *p = to_seiko_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (p->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) err = regulator_enable(p->dvdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) dev_err(panel->dev, "failed to enable dvdd: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* Add a 100ms delay as per the panel datasheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) err = regulator_enable(p->avdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) dev_err(panel->dev, "failed to enable avdd: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) goto disable_dvdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) p->prepared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) disable_dvdd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) regulator_disable(p->dvdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int seiko_panel_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct seiko_panel *p = to_seiko_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (p->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) p->enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int seiko_panel_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct seiko_panel *p = to_seiko_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* add hard-coded panel modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return seiko_panel_get_fixed_modes(p, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int seiko_panel_get_timings(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) unsigned int num_timings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct display_timing *timings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct seiko_panel *p = to_seiko_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (p->desc->num_timings < num_timings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) num_timings = p->desc->num_timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (timings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) for (i = 0; i < num_timings; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) timings[i] = p->desc->timings[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return p->desc->num_timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct drm_panel_funcs seiko_panel_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .disable = seiko_panel_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .unprepare = seiko_panel_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .prepare = seiko_panel_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .enable = seiko_panel_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .get_modes = seiko_panel_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .get_timings = seiko_panel_get_timings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static int seiko_panel_probe(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) const struct seiko_panel_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct seiko_panel *panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (!panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) panel->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) panel->prepared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) panel->desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) panel->dvdd = devm_regulator_get(dev, "dvdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (IS_ERR(panel->dvdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return PTR_ERR(panel->dvdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) panel->avdd = devm_regulator_get(dev, "avdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (IS_ERR(panel->avdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return PTR_ERR(panel->avdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) drm_panel_init(&panel->base, dev, &seiko_panel_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DRM_MODE_CONNECTOR_DPI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) err = drm_panel_of_backlight(&panel->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) drm_panel_add(&panel->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dev_set_drvdata(dev, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int seiko_panel_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct seiko_panel *panel = dev_get_drvdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) drm_panel_remove(&panel->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) drm_panel_disable(&panel->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static void seiko_panel_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct seiko_panel *panel = dev_get_drvdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) drm_panel_disable(&panel->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const struct display_timing seiko_43wvf1g_timing = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .pixelclock = { 33500000, 33500000, 33500000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .hactive = { 800, 800, 800 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .hfront_porch = { 164, 164, 164 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .hback_porch = { 89, 89, 89 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .hsync_len = { 10, 10, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .vactive = { 480, 480, 480 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .vfront_porch = { 10, 10, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .vback_porch = { 23, 23, 23 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .vsync_len = { 10, 10, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .flags = DISPLAY_FLAGS_DE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static const struct seiko_panel_desc seiko_43wvf1g = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .timings = &seiko_43wvf1g_timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .num_timings = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .bpc = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .size = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .width = 93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .height = 57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static const struct of_device_id platform_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .compatible = "sii,43wvf1g",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .data = &seiko_43wvf1g,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MODULE_DEVICE_TABLE(of, platform_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static int seiko_panel_platform_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) const struct of_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) id = of_match_node(platform_of_match, pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (!id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return seiko_panel_probe(&pdev->dev, id->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static struct platform_driver seiko_panel_platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .name = "seiko_panel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .of_match_table = platform_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .probe = seiko_panel_platform_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .remove = seiko_panel_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .shutdown = seiko_panel_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) module_platform_driver(seiko_panel_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MODULE_AUTHOR("Marco Franchi <marco.franchi@nxp.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MODULE_DESCRIPTION("Seiko 43WVF1G panel driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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