^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MIPI-DSI based s6e8aa0 AMOLED LCD 5.3 inch panel driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2013 Samsung Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Inki Dae, <inki.dae@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Donghwa Lee, <dh09.lee@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Joongmock Shin <jmock.shin@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Eunchul Kim <chulspro.kim@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Tomasz Figa <t.figa@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Andrzej Hajda <a.hajda@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <video/mipi_display.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <video/of_videomode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <video/videomode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <drm/drm_modes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LDI_MTP_LENGTH 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define GAMMA_LEVEL_NUM 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define GAMMA_TABLE_LEN 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PANELCTL_SS_MASK (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PANELCTL_SS_1_800 (0 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PANELCTL_SS_800_1 (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PANELCTL_GTCON_MASK (7 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PANELCTL_GTCON_110 (6 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PANELCTL_GTCON_111 (7 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PANELCTL_CLK1_CON_MASK (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PANELCTL_CLK1_000 (0 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PANELCTL_CLK1_001 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PANELCTL_CLK2_CON_MASK (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PANELCTL_CLK2_000 (0 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PANELCTL_CLK2_001 (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PANELCTL_INT1_CON_MASK (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PANELCTL_INT1_000 (0 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PANELCTL_INT1_001 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PANELCTL_INT2_CON_MASK (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PANELCTL_INT2_000 (0 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PANELCTL_INT2_001 (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PANELCTL_BICTL_CON_MASK (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PANELCTL_BICTL_000 (0 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PANELCTL_BICTL_001 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PANELCTL_BICTLB_CON_MASK (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PANELCTL_BICTLB_000 (0 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PANELCTL_BICTLB_001 (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PANELCTL_EM_CLK1_CON_MASK (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PANELCTL_EM_CLK1_110 (6 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PANELCTL_EM_CLK1_111 (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PANELCTL_EM_CLK1B_CON_MASK (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PANELCTL_EM_CLK1B_110 (6 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define PANELCTL_EM_CLK1B_111 (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PANELCTL_EM_CLK2_CON_MASK (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define PANELCTL_EM_CLK2_110 (6 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PANELCTL_EM_CLK2_111 (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define PANELCTL_EM_CLK2B_CON_MASK (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define PANELCTL_EM_CLK2B_110 (6 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define PANELCTL_EM_CLK2B_111 (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define PANELCTL_EM_INT1_CON_MASK (7 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PANELCTL_EM_INT1_000 (0 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define PANELCTL_EM_INT1_001 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define PANELCTL_EM_INT2_CON_MASK (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PANELCTL_EM_INT2_000 (0 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define PANELCTL_EM_INT2_001 (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define AID_DISABLE (0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define AID_1 (0x5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define AID_2 (0x6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define AID_3 (0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) typedef u8 s6e8aa0_gamma_table[GAMMA_TABLE_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct s6e8aa0_variant {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) const s6e8aa0_gamma_table *gamma_tables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct s6e8aa0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct drm_panel panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct regulator_bulk_data supplies[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u32 power_on_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u32 reset_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u32 init_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) bool flip_horizontal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) bool flip_vertical;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct videomode vm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u32 width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u32 height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) const struct s6e8aa0_variant *variant;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* This field is tested by functions directly accessing DSI bus before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * transfer, transfer is skipped if it is set. In case of transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * failure or unexpected response the field is set to error value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Such construct allows to eliminate many checks in higher level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static inline struct s6e8aa0 *panel_to_s6e8aa0(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return container_of(panel, struct s6e8aa0, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int s6e8aa0_clear_error(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int ret = ctx->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ctx->error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static void s6e8aa0_dcs_write(struct s6e8aa0 *ctx, const void *data, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (ctx->error < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) (int)len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ctx->error = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static int s6e8aa0_dcs_read(struct s6e8aa0 *ctx, u8 cmd, void *data, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (ctx->error < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return ctx->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ret = mipi_dsi_dcs_read(dsi, cmd, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dev_err(ctx->dev, "error %d reading dcs seq(%#x)\n", ret, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ctx->error = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define s6e8aa0_dcs_write_seq(ctx, seq...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ({\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) const u8 d[] = { seq };\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) BUILD_BUG_ON_MSG(ARRAY_SIZE(d) > 64, "DCS sequence too big for stack");\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) s6e8aa0_dcs_write(ctx, d, ARRAY_SIZE(d));\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define s6e8aa0_dcs_write_seq_static(ctx, seq...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ({\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const u8 d[] = { seq };\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) s6e8aa0_dcs_write(ctx, d, ARRAY_SIZE(d));\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void s6e8aa0_apply_level_1_key(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) s6e8aa0_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static void s6e8aa0_panel_cond_set_v142(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const u8 aids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 0x04, 0x04, 0x04, 0x04, 0x04, 0x60, 0x80, 0xA0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) u8 aid = aids[ctx->id >> 5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) u8 cfg = 0x3d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) u8 clk_con = 0xc8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u8 int_con = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u8 bictl_con = 0x48;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) u8 em_clk1_con = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u8 em_clk2_con = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) u8 em_int_con = 0xc8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ctx->flip_vertical) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* GTCON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) cfg &= ~(PANELCTL_GTCON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) cfg |= (PANELCTL_GTCON_110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (ctx->flip_horizontal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* SS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) cfg &= ~(PANELCTL_SS_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) cfg |= (PANELCTL_SS_1_800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (ctx->flip_horizontal || ctx->flip_vertical) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* CLK1,2_CON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) clk_con &= ~(PANELCTL_CLK1_CON_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PANELCTL_CLK2_CON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) clk_con |= (PANELCTL_CLK1_000 | PANELCTL_CLK2_001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* INT1,2_CON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) int_con &= ~(PANELCTL_INT1_CON_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PANELCTL_INT2_CON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) int_con |= (PANELCTL_INT1_000 | PANELCTL_INT2_001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* BICTL,B_CON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) bictl_con &= ~(PANELCTL_BICTL_CON_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) PANELCTL_BICTLB_CON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) bictl_con |= (PANELCTL_BICTL_000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PANELCTL_BICTLB_001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* EM_CLK1,1B_CON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) em_clk1_con &= ~(PANELCTL_EM_CLK1_CON_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PANELCTL_EM_CLK1B_CON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) em_clk1_con |= (PANELCTL_EM_CLK1_110 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PANELCTL_EM_CLK1B_110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* EM_CLK2,2B_CON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) em_clk2_con &= ~(PANELCTL_EM_CLK2_CON_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PANELCTL_EM_CLK2B_CON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) em_clk2_con |= (PANELCTL_EM_CLK2_110 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PANELCTL_EM_CLK2B_110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* EM_INT1,2_CON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) em_int_con &= ~(PANELCTL_EM_INT1_CON_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) PANELCTL_EM_INT2_CON_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) em_int_con |= (PANELCTL_EM_INT1_000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) PANELCTL_EM_INT2_001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) s6e8aa0_dcs_write_seq(ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 0xf8, cfg, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 0x3c, 0x78, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 0x00, 0x20, aid, 0x08, 0x6e, 0x00, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 0x02, 0x07, 0x07, 0x23, 0x23, 0xc0, clk_con, int_con,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) bictl_con, 0xc1, 0x00, 0xc1, em_clk1_con, em_clk2_con,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) em_int_con);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static void s6e8aa0_panel_cond_set(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (ctx->version < 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) s6e8aa0_dcs_write_seq_static(ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x94, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 0x3c, 0x78, 0x10, 0x27, 0x08, 0x6e, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 0x00, 0x00, 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 0x00, 0x07, 0x07, 0x23, 0x6e, 0xc0, 0xc1, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 0x81, 0xc1, 0x00, 0xc3, 0xf6, 0xf6, 0xc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) s6e8aa0_panel_cond_set_v142(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static void s6e8aa0_display_condition_set(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) s6e8aa0_dcs_write_seq_static(ctx, 0xf2, 0x80, 0x03, 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static void s6e8aa0_etc_source_control(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) s6e8aa0_dcs_write_seq_static(ctx, 0xf6, 0x00, 0x02, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static void s6e8aa0_etc_pentile_control(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const u8 pent32[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xc0, 0x44, 0x44, 0xc0, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static const u8 pent142[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (ctx->version < 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) s6e8aa0_dcs_write(ctx, pent32, ARRAY_SIZE(pent32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) s6e8aa0_dcs_write(ctx, pent142, ARRAY_SIZE(pent142));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static void s6e8aa0_etc_power_control(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static const u8 pwr142[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x1e, 0x33, 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static const u8 pwr32[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 0xf4, 0xcf, 0x0a, 0x15, 0x10, 0x19, 0x33, 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (ctx->version < 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) s6e8aa0_dcs_write(ctx, pwr32, ARRAY_SIZE(pwr32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) s6e8aa0_dcs_write(ctx, pwr142, ARRAY_SIZE(pwr142));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static void s6e8aa0_etc_elvss_control(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) u8 id = ctx->id ? 0 : 0x95;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) s6e8aa0_dcs_write_seq(ctx, 0xb1, 0x04, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static void s6e8aa0_elvss_nvm_set_v142(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u8 br;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) switch (ctx->brightness) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case 0 ... 6: /* 30cd ~ 100cd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) br = 0xdf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case 7 ... 11: /* 120cd ~ 150cd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) br = 0xdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) case 12 ... 15: /* 180cd ~ 210cd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) br = 0xd9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case 16 ... 24: /* 240cd ~ 300cd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) br = 0xd0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) s6e8aa0_dcs_write_seq(ctx, 0xd9, 0x14, 0x40, 0x0c, 0xcb, 0xce, 0x6e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 0xc4, 0x0f, 0x40, 0x41, br, 0x00, 0x60, 0x19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static void s6e8aa0_elvss_nvm_set(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (ctx->version < 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) s6e8aa0_dcs_write_seq_static(ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 0xd9, 0x14, 0x40, 0x0c, 0xcb, 0xce, 0x6e, 0xc4, 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 0x40, 0x41, 0xc1, 0x00, 0x60, 0x19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) s6e8aa0_elvss_nvm_set_v142(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static void s6e8aa0_apply_level_2_key(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) s6e8aa0_dcs_write_seq_static(ctx, 0xfc, 0x5a, 0x5a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static const s6e8aa0_gamma_table s6e8aa0_gamma_tables_v142[GAMMA_LEVEL_NUM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x62, 0x55, 0x55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 0xaf, 0xb1, 0xb1, 0xbd, 0xce, 0xb7, 0x9a, 0xb1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 0x90, 0xb2, 0xc4, 0xae, 0x00, 0x60, 0x00, 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 0x00, 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x74, 0x68, 0x69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 0xb8, 0xc1, 0xb7, 0xbd, 0xcd, 0xb8, 0x93, 0xab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 0x88, 0xb4, 0xc4, 0xb1, 0x00, 0x6b, 0x00, 0x4d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 0x00, 0x7d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x95, 0x8a, 0x89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 0xb4, 0xc6, 0xb2, 0xc5, 0xd2, 0xbf, 0x90, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 0x85, 0xb5, 0xc4, 0xb3, 0x00, 0x7b, 0x00, 0x5d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 0x00, 0x8f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x9f, 0x98, 0x92,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 0xb3, 0xc4, 0xb0, 0xbc, 0xcc, 0xb4, 0x91, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 0x87, 0xb5, 0xc5, 0xb4, 0x00, 0x87, 0x00, 0x6a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 0x00, 0x9e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x99, 0x93, 0x8b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 0xb2, 0xc2, 0xb0, 0xbd, 0xce, 0xb4, 0x90, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 0x87, 0xb3, 0xc3, 0xb2, 0x00, 0x8d, 0x00, 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 0x00, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa7, 0xa5, 0x99,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 0xb2, 0xc2, 0xb0, 0xbb, 0xcd, 0xb1, 0x93, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 0x8a, 0xb2, 0xc1, 0xb0, 0x00, 0x92, 0x00, 0x75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 0x00, 0xaa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa0, 0xa0, 0x93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 0xb6, 0xc4, 0xb4, 0xb5, 0xc8, 0xaa, 0x94, 0xa9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 0x8c, 0xb2, 0xc0, 0xb0, 0x00, 0x97, 0x00, 0x7a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 0x00, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa3, 0xa7, 0x96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 0xb3, 0xc2, 0xb0, 0xba, 0xcb, 0xb0, 0x94, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 0x8c, 0xb0, 0xbf, 0xaf, 0x00, 0x9f, 0x00, 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 0x00, 0xb9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x9d, 0xa2, 0x90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 0xb6, 0xc5, 0xb3, 0xb8, 0xc9, 0xae, 0x94, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 0x8d, 0xaf, 0xbd, 0xad, 0x00, 0xa4, 0x00, 0x88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 0x00, 0xbf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa6, 0xac, 0x97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 0xb4, 0xc4, 0xb1, 0xbb, 0xcb, 0xb2, 0x93, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 0x8d, 0xae, 0xbc, 0xad, 0x00, 0xa7, 0x00, 0x8c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 0x00, 0xc3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa2, 0xa9, 0x93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 0xb6, 0xc5, 0xb2, 0xba, 0xc9, 0xb0, 0x93, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 0x8d, 0xae, 0xbb, 0xac, 0x00, 0xab, 0x00, 0x90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 0x00, 0xc8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0x9e, 0xa6, 0x8f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 0xb7, 0xc6, 0xb3, 0xb8, 0xc8, 0xb0, 0x93, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 0x8c, 0xae, 0xbb, 0xad, 0x00, 0xae, 0x00, 0x93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 0x00, 0xcc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xab, 0xb4, 0x9c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 0xb3, 0xc3, 0xaf, 0xb7, 0xc7, 0xaf, 0x93, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 0x8c, 0xaf, 0xbc, 0xad, 0x00, 0xb1, 0x00, 0x97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 0x00, 0xcf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa6, 0xb1, 0x98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 0xb1, 0xc2, 0xab, 0xba, 0xc9, 0xb2, 0x93, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 0x8d, 0xae, 0xba, 0xab, 0x00, 0xb5, 0x00, 0x9b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 0x00, 0xd4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa3, 0xae, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 0xb2, 0xc3, 0xac, 0xbb, 0xca, 0xb4, 0x91, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 0x8a, 0xae, 0xba, 0xac, 0x00, 0xb8, 0x00, 0x9e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 0x00, 0xd8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xab, 0xb7, 0x9c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 0xae, 0xc0, 0xa9, 0xba, 0xc9, 0xb3, 0x92, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 0x8b, 0xad, 0xb9, 0xab, 0x00, 0xbb, 0x00, 0xa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 0x00, 0xdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa7, 0xb4, 0x97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 0xb0, 0xc1, 0xaa, 0xb9, 0xc8, 0xb2, 0x92, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 0x8c, 0xae, 0xb9, 0xab, 0x00, 0xbe, 0x00, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 0x00, 0xdf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa3, 0xb0, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 0xb0, 0xc2, 0xab, 0xbb, 0xc9, 0xb3, 0x91, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 0x8b, 0xad, 0xb8, 0xaa, 0x00, 0xc1, 0x00, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 0x00, 0xe2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa3, 0xb0, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 0xae, 0xbf, 0xa8, 0xb9, 0xc8, 0xb3, 0x92, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 0x8b, 0xad, 0xb7, 0xa9, 0x00, 0xc4, 0x00, 0xab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 0x00, 0xe6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa7, 0xb6, 0x98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 0xaf, 0xc0, 0xa8, 0xb8, 0xc7, 0xb2, 0x93, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 0x8d, 0xad, 0xb7, 0xa9, 0x00, 0xc7, 0x00, 0xae,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 0x00, 0xe9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa4, 0xb3, 0x95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 0xaf, 0xc1, 0xa9, 0xb9, 0xc8, 0xb3, 0x92, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 0x8b, 0xad, 0xb7, 0xaa, 0x00, 0xc9, 0x00, 0xb0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 0x00, 0xec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa4, 0xb3, 0x95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 0xac, 0xbe, 0xa6, 0xbb, 0xc9, 0xb4, 0x90, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 0x8a, 0xad, 0xb7, 0xa9, 0x00, 0xcc, 0x00, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 0x00, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa0, 0xb0, 0x91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 0xae, 0xc0, 0xa6, 0xba, 0xc8, 0xb4, 0x91, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 0x8b, 0xad, 0xb7, 0xa9, 0x00, 0xcf, 0x00, 0xb7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 0x00, 0xf3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa7, 0xb8, 0x98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 0xab, 0xbd, 0xa4, 0xbb, 0xc9, 0xb5, 0x91, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 0x8b, 0xac, 0xb6, 0xa8, 0x00, 0xd1, 0x00, 0xb9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 0x00, 0xf6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 0xfa, 0x01, 0x71, 0x31, 0x7b, 0xa4, 0xb5, 0x95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 0xa9, 0xbc, 0xa1, 0xbb, 0xc9, 0xb5, 0x91, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 0x8a, 0xad, 0xb6, 0xa8, 0x00, 0xd6, 0x00, 0xbf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 0x00, 0xfc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static const s6e8aa0_gamma_table s6e8aa0_gamma_tables_v96[GAMMA_LEVEL_NUM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 0xdf, 0x1f, 0xd7, 0xdc, 0xb7, 0xe1, 0xc0, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 0xc4, 0xd2, 0xd0, 0xcf, 0x00, 0x4d, 0x00, 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 0x00, 0x5f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 0xd5, 0x35, 0xcf, 0xdc, 0xc1, 0xe1, 0xbf, 0xb3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 0xc1, 0xd2, 0xd1, 0xce, 0x00, 0x53, 0x00, 0x46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 0x00, 0x67,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 0xd2, 0x64, 0xcf, 0xdb, 0xc6, 0xe1, 0xbd, 0xb3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 0xbd, 0xd2, 0xd2, 0xce, 0x00, 0x59, 0x00, 0x4b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 0x00, 0x6e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 0xd0, 0x7c, 0xcf, 0xdb, 0xc9, 0xe0, 0xbc, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 0xbb, 0xcf, 0xd1, 0xcc, 0x00, 0x5f, 0x00, 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 0x00, 0x75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 0xd0, 0x8e, 0xd1, 0xdb, 0xcc, 0xdf, 0xbb, 0xb6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 0xb9, 0xd0, 0xd1, 0xcd, 0x00, 0x63, 0x00, 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 0x00, 0x7a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 0xd1, 0x9e, 0xd5, 0xda, 0xcd, 0xdd, 0xbb, 0xb7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 0xb9, 0xce, 0xce, 0xc9, 0x00, 0x68, 0x00, 0x59,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 0x00, 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x00, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 0xd0, 0xa5, 0xd6, 0xda, 0xcf, 0xdd, 0xbb, 0xb7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 0xb8, 0xcc, 0xcd, 0xc7, 0x00, 0x6c, 0x00, 0x5c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 0x00, 0x86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x1f, 0xfe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 0xd0, 0xae, 0xd7, 0xd9, 0xd0, 0xdb, 0xb9, 0xb6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 0xb5, 0xca, 0xcc, 0xc5, 0x00, 0x74, 0x00, 0x63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 0x00, 0x90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x1f, 0xf9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 0xcf, 0xb0, 0xd6, 0xd9, 0xd1, 0xdb, 0xb9, 0xb6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 0xb4, 0xca, 0xcb, 0xc5, 0x00, 0x77, 0x00, 0x66,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 0x00, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xff, 0x1f, 0xf7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 0xcf, 0xb3, 0xd7, 0xd8, 0xd1, 0xd9, 0xb7, 0xb6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 0xb3, 0xc9, 0xca, 0xc3, 0x00, 0x7b, 0x00, 0x69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 0x00, 0x99,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xfd, 0x2f, 0xf7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 0xdf, 0xb5, 0xd6, 0xd8, 0xd1, 0xd8, 0xb6, 0xb5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 0xb2, 0xca, 0xcb, 0xc4, 0x00, 0x7e, 0x00, 0x6c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 0x00, 0x9d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xfa, 0x2f, 0xf5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 0xce, 0xb6, 0xd5, 0xd7, 0xd2, 0xd8, 0xb6, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 0xb0, 0xc7, 0xc9, 0xc1, 0x00, 0x84, 0x00, 0x71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 0x00, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xf7, 0x2f, 0xf2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 0xce, 0xb9, 0xd5, 0xd8, 0xd2, 0xd8, 0xb4, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 0xaf, 0xc7, 0xc9, 0xc1, 0x00, 0x87, 0x00, 0x73,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 0x00, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xf5, 0x2f, 0xf0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 0xdf, 0xba, 0xd5, 0xd7, 0xd2, 0xd7, 0xb4, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 0xaf, 0xc5, 0xc7, 0xbf, 0x00, 0x8a, 0x00, 0x76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 0x00, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xf2, 0x2f, 0xed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 0xcE, 0xbb, 0xd4, 0xd6, 0xd2, 0xd6, 0xb5, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 0xaF, 0xc5, 0xc7, 0xbf, 0x00, 0x8c, 0x00, 0x78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 0x00, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xef, 0x2f, 0xeb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 0xcd, 0xbb, 0xd2, 0xd7, 0xd3, 0xd6, 0xb3, 0xb4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 0xae, 0xc5, 0xc6, 0xbe, 0x00, 0x91, 0x00, 0x7d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 0x00, 0xb6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xee, 0x2f, 0xea,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 0xce, 0xbd, 0xd4, 0xd6, 0xd2, 0xd5, 0xb2, 0xb3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 0xad, 0xc3, 0xc4, 0xbb, 0x00, 0x94, 0x00, 0x7f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 0x00, 0xba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xec, 0x2f, 0xe8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 0xce, 0xbe, 0xd3, 0xd6, 0xd3, 0xd5, 0xb2, 0xb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 0xac, 0xc3, 0xc5, 0xbc, 0x00, 0x96, 0x00, 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 0x00, 0xbd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xeb, 0x2f, 0xe7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 0xce, 0xbf, 0xd3, 0xd6, 0xd2, 0xd5, 0xb1, 0xb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 0xab, 0xc2, 0xc4, 0xbb, 0x00, 0x99, 0x00, 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 0x00, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xef, 0x5f, 0xe9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 0xca, 0xbf, 0xd3, 0xd5, 0xd2, 0xd4, 0xb2, 0xb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 0xab, 0xc1, 0xc4, 0xba, 0x00, 0x9b, 0x00, 0x85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 0x00, 0xc3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xea, 0x5f, 0xe8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 0xee, 0xbf, 0xd2, 0xd5, 0xd2, 0xd4, 0xb1, 0xb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 0xab, 0xc1, 0xc2, 0xb9, 0x00, 0x9D, 0x00, 0x87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 0x00, 0xc6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xe9, 0x5f, 0xe7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 0xcd, 0xbf, 0xd2, 0xd6, 0xd2, 0xd4, 0xb1, 0xb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 0xab, 0xbe, 0xc0, 0xb7, 0x00, 0xa1, 0x00, 0x8a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 0x00, 0xca,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xe8, 0x61, 0xe6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 0xcd, 0xbf, 0xd1, 0xd6, 0xd3, 0xd4, 0xaf, 0xb0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 0xa9, 0xbe, 0xc1, 0xb7, 0x00, 0xa3, 0x00, 0x8b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 0x00, 0xce,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xe8, 0x62, 0xe5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 0xcc, 0xc0, 0xd0, 0xd6, 0xd2, 0xd4, 0xaf, 0xb1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 0xa9, 0xbd, 0xc0, 0xb6, 0x00, 0xa5, 0x00, 0x8d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 0x00, 0xd0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 0xfa, 0x01, 0x1f, 0x1f, 0x1f, 0xe7, 0x7f, 0xe3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 0xcc, 0xc1, 0xd0, 0xd5, 0xd3, 0xd3, 0xae, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 0xa8, 0xbe, 0xc0, 0xb7, 0x00, 0xa8, 0x00, 0x90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 0x00, 0xd3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static const s6e8aa0_gamma_table s6e8aa0_gamma_tables_v32[GAMMA_LEVEL_NUM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 0xfa, 0x01, 0x43, 0x14, 0x45, 0x72, 0x5e, 0x6b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 0xa1, 0xa7, 0x9a, 0xb4, 0xcb, 0xb8, 0x92, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 0x97, 0xb4, 0xc3, 0xb5, 0x00, 0x4e, 0x00, 0x37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 0x00, 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 0xfa, 0x01, 0x43, 0x14, 0x45, 0x85, 0x71, 0x7d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 0xa6, 0xb6, 0xa1, 0xb5, 0xca, 0xba, 0x93, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 0x98, 0xb2, 0xc0, 0xaf, 0x00, 0x59, 0x00, 0x43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 0x00, 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xa4, 0x94, 0x9e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 0xa0, 0xbb, 0x9c, 0xc3, 0xd2, 0xc6, 0x93, 0xaa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 0x95, 0xb7, 0xc2, 0xb4, 0x00, 0x65, 0x00, 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 0x00, 0x74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xa1, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 0xa0, 0xb9, 0x9b, 0xc3, 0xd1, 0xc8, 0x90, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 0x90, 0xbb, 0xc3, 0xb7, 0x00, 0x6f, 0x00, 0x5b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 0x00, 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xa6, 0x9d, 0x9f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 0x9f, 0xb8, 0x9a, 0xc7, 0xd5, 0xcc, 0x90, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 0x8f, 0xb8, 0xc1, 0xb6, 0x00, 0x74, 0x00, 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 0x00, 0x85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb3, 0xae, 0xae,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 0x9e, 0xb7, 0x9a, 0xc8, 0xd6, 0xce, 0x91, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 0x90, 0xb6, 0xc0, 0xb3, 0x00, 0x78, 0x00, 0x65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 0x00, 0x8a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xa9, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 0xa3, 0xb9, 0x9e, 0xc4, 0xd3, 0xcb, 0x94, 0xa6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 0x90, 0xb6, 0xbf, 0xb3, 0x00, 0x7c, 0x00, 0x69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 0x00, 0x8e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xaf, 0xaf, 0xa9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 0xa5, 0xbc, 0xa2, 0xc7, 0xd5, 0xcd, 0x93, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 0x8f, 0xb4, 0xbd, 0xb1, 0x00, 0x83, 0x00, 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 0x00, 0x96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xa9, 0xab, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 0xaa, 0xbf, 0xa7, 0xc5, 0xd3, 0xcb, 0x93, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 0x8f, 0xb2, 0xbb, 0xb0, 0x00, 0x86, 0x00, 0x74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 0x00, 0x9b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb1, 0xb5, 0xab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 0xab, 0xc0, 0xa9, 0xc7, 0xd4, 0xcc, 0x94, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 0x8f, 0xb1, 0xbb, 0xaf, 0x00, 0x8a, 0x00, 0x77,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 0x00, 0x9e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xb2, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 0xae, 0xc2, 0xab, 0xc5, 0xd3, 0xca, 0x93, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 0x8f, 0xb1, 0xba, 0xae, 0x00, 0x8d, 0x00, 0x7b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 0x00, 0xa2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xa9, 0xaf, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 0xb0, 0xc3, 0xae, 0xc4, 0xd1, 0xc8, 0x93, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 0x8f, 0xb1, 0xba, 0xaf, 0x00, 0x8f, 0x00, 0x7d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 0x00, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb4, 0xbd, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 0xae, 0xc1, 0xab, 0xc2, 0xd0, 0xc6, 0x94, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 0x8f, 0xb1, 0xba, 0xaf, 0x00, 0x92, 0x00, 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) 0x00, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb0, 0xb9, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 0xad, 0xc1, 0xab, 0xc4, 0xd1, 0xc7, 0x95, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 0x90, 0xb0, 0xb9, 0xad, 0x00, 0x95, 0x00, 0x84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 0x00, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xb6, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 0xaf, 0xc2, 0xae, 0xc5, 0xd1, 0xc7, 0x93, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 0x8e, 0xb0, 0xb9, 0xad, 0x00, 0x98, 0x00, 0x86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 0x00, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb4, 0xbf, 0xaf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 0xad, 0xc1, 0xab, 0xc3, 0xd0, 0xc6, 0x94, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 0x8f, 0xaf, 0xb8, 0xac, 0x00, 0x9a, 0x00, 0x89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 0x00, 0xb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb0, 0xbc, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 0xaf, 0xc2, 0xad, 0xc2, 0xcf, 0xc4, 0x94, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 0x90, 0xaf, 0xb8, 0xad, 0x00, 0x9c, 0x00, 0x8b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 0x00, 0xb5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xb9, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 0xb1, 0xc4, 0xaf, 0xc3, 0xcf, 0xc5, 0x94, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 0x8f, 0xae, 0xb7, 0xac, 0x00, 0x9f, 0x00, 0x8e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 0x00, 0xb8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xb9, 0xa7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 0xaf, 0xc2, 0xad, 0xc1, 0xce, 0xc3, 0x95, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 0x90, 0xad, 0xb6, 0xab, 0x00, 0xa2, 0x00, 0x91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 0x00, 0xbb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb1, 0xbe, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 0xb1, 0xc4, 0xaf, 0xc1, 0xcd, 0xc1, 0x95, 0xa4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 0x91, 0xad, 0xb6, 0xab, 0x00, 0xa4, 0x00, 0x93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 0x00, 0xbd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xbb, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 0xb3, 0xc5, 0xb2, 0xc1, 0xcd, 0xc2, 0x95, 0xa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 0x90, 0xad, 0xb6, 0xab, 0x00, 0xa6, 0x00, 0x95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 0x00, 0xc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xbb, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 0xb0, 0xc3, 0xaf, 0xc2, 0xce, 0xc2, 0x94, 0xa2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 0x90, 0xac, 0xb6, 0xab, 0x00, 0xa8, 0x00, 0x98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 0x00, 0xc3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xa9, 0xb8, 0xa5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 0xb3, 0xc5, 0xb2, 0xc1, 0xcc, 0xc0, 0x95, 0xa2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 0x90, 0xad, 0xb6, 0xab, 0x00, 0xaa, 0x00, 0x9a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 0x00, 0xc5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xb0, 0xc0, 0xac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 0xb0, 0xc3, 0xaf, 0xc1, 0xcd, 0xc1, 0x95, 0xa2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 0x90, 0xac, 0xb5, 0xa9, 0x00, 0xac, 0x00, 0x9c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 0x00, 0xc8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 0xfa, 0x01, 0x43, 0x14, 0x45, 0xad, 0xbd, 0xa8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 0xaf, 0xc2, 0xaf, 0xc1, 0xcc, 0xc0, 0x95, 0xa2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 0x90, 0xac, 0xb5, 0xaa, 0x00, 0xb1, 0x00, 0xa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 0x00, 0xcc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static const struct s6e8aa0_variant s6e8aa0_variants[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .version = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .gamma_tables = s6e8aa0_gamma_tables_v32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .version = 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) .gamma_tables = s6e8aa0_gamma_tables_v96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .version = 142,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .gamma_tables = s6e8aa0_gamma_tables_v142,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .version = 210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .gamma_tables = s6e8aa0_gamma_tables_v142,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) static void s6e8aa0_brightness_set(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) const u8 *gamma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (ctx->error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) gamma = ctx->variant->gamma_tables[ctx->brightness];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (ctx->version >= 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) s6e8aa0_elvss_nvm_set(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) s6e8aa0_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) /* update gamma table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) s6e8aa0_dcs_write_seq_static(ctx, 0xf7, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) static void s6e8aa0_panel_init(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) s6e8aa0_apply_level_1_key(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) s6e8aa0_apply_level_2_key(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) s6e8aa0_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) msleep(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) s6e8aa0_panel_cond_set(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) s6e8aa0_display_condition_set(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) s6e8aa0_brightness_set(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) s6e8aa0_etc_source_control(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) s6e8aa0_etc_pentile_control(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) s6e8aa0_elvss_nvm_set(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) s6e8aa0_etc_power_control(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) s6e8aa0_etc_elvss_control(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) msleep(ctx->init_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static void s6e8aa0_set_maximum_return_packet_size(struct s6e8aa0 *ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) u16 size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) if (ctx->error < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ret = mipi_dsi_set_maximum_return_packet_size(dsi, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) dev_err(ctx->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) "error %d setting maximum return packet size to %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) ret, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) ctx->error = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static void s6e8aa0_read_mtp_id(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) u8 id[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) ret = s6e8aa0_dcs_read(ctx, 0xd1, id, ARRAY_SIZE(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) if (ret < 0 || ret < ARRAY_SIZE(id) || id[0] == 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) dev_err(ctx->dev, "read id failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) ctx->error = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) dev_info(ctx->dev, "ID: 0x%2x, 0x%2x, 0x%2x\n", id[0], id[1], id[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) for (i = 0; i < ARRAY_SIZE(s6e8aa0_variants); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (id[1] == s6e8aa0_variants[i].version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) if (i >= ARRAY_SIZE(s6e8aa0_variants)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) dev_err(ctx->dev, "unsupported display version %d\n", id[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) ctx->error = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) ctx->variant = &s6e8aa0_variants[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) ctx->version = id[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) ctx->id = id[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static void s6e8aa0_set_sequence(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) s6e8aa0_set_maximum_return_packet_size(ctx, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) s6e8aa0_read_mtp_id(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) s6e8aa0_panel_init(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) s6e8aa0_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) static int s6e8aa0_power_on(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) msleep(ctx->power_on_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) gpiod_set_value(ctx->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) gpiod_set_value(ctx->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) msleep(ctx->reset_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) static int s6e8aa0_power_off(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static int s6e8aa0_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static int s6e8aa0_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) struct s6e8aa0 *ctx = panel_to_s6e8aa0(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) s6e8aa0_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) s6e8aa0_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) msleep(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) s6e8aa0_clear_error(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) return s6e8aa0_power_off(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) static int s6e8aa0_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) struct s6e8aa0 *ctx = panel_to_s6e8aa0(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) ret = s6e8aa0_power_on(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) s6e8aa0_set_sequence(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) ret = ctx->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) s6e8aa0_unprepare(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) static int s6e8aa0_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) static int s6e8aa0_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) struct s6e8aa0 *ctx = panel_to_s6e8aa0(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) mode = drm_mode_create(connector->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) dev_err(panel->dev, "failed to create a new display mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) drm_display_mode_from_videomode(&ctx->vm, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) mode->width_mm = ctx->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) mode->height_mm = ctx->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) connector->display_info.width_mm = mode->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) connector->display_info.height_mm = mode->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) static const struct drm_panel_funcs s6e8aa0_drm_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .disable = s6e8aa0_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) .unprepare = s6e8aa0_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) .prepare = s6e8aa0_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .enable = s6e8aa0_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .get_modes = s6e8aa0_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) static int s6e8aa0_parse_dt(struct s6e8aa0 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct device *dev = ctx->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) ret = of_get_videomode(np, &ctx->vm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) of_property_read_u32(np, "reset-delay", &ctx->reset_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) of_property_read_u32(np, "init-delay", &ctx->init_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) ctx->flip_horizontal = of_property_read_bool(np, "flip-horizontal");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) ctx->flip_vertical = of_property_read_bool(np, "flip-vertical");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static int s6e8aa0_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) struct s6e8aa0 *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) ctx = devm_kzalloc(dev, sizeof(struct s6e8aa0), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (!ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) mipi_dsi_set_drvdata(dsi, ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) ctx->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) dsi->lanes = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) | MIPI_DSI_MODE_VIDEO_HFP | MIPI_DSI_MODE_VIDEO_HBP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) | MIPI_DSI_MODE_VIDEO_HSA | MIPI_DSI_MODE_EOT_PACKET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) | MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_AUTO_VERT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) ret = s6e8aa0_parse_dt(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) ctx->supplies[0].supply = "vdd3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) ctx->supplies[1].supply = "vci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) dev_err(dev, "failed to get regulators: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) if (IS_ERR(ctx->reset_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) dev_err(dev, "cannot get reset-gpios %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) PTR_ERR(ctx->reset_gpio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) return PTR_ERR(ctx->reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) ctx->brightness = GAMMA_LEVEL_NUM - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) drm_panel_init(&ctx->panel, dev, &s6e8aa0_drm_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) drm_panel_add(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static int s6e8aa0_remove(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) struct s6e8aa0 *ctx = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) mipi_dsi_detach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) static const struct of_device_id s6e8aa0_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) { .compatible = "samsung,s6e8aa0" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) MODULE_DEVICE_TABLE(of, s6e8aa0_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) static struct mipi_dsi_driver s6e8aa0_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .probe = s6e8aa0_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .remove = s6e8aa0_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) .name = "panel-samsung-s6e8aa0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) .of_match_table = s6e8aa0_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) module_mipi_dsi_driver(s6e8aa0_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) MODULE_AUTHOR("Joongmock Shin <jmock.shin@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) MODULE_AUTHOR("Eunchul Kim <chulspro.kim@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) MODULE_AUTHOR("Tomasz Figa <t.figa@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) MODULE_DESCRIPTION("MIPI-DSI based s6e8aa0 AMOLED LCD Panel Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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