^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Raydium RM67191 MIPI-DSI panel driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2019 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/backlight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <video/mipi_display.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <video/of_videomode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <video/videomode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <drm/drm_crtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Panel specific color-format bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define COL_FMT_16BPP 0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define COL_FMT_18BPP 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define COL_FMT_24BPP 0x77
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Write Manufacture Command Set Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define WRMAUCCTR 0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Manufacturer Command Set pages (CMD2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct cmd_set_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u8 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u8 param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * There is no description in the Reference Manual about these commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * We received them from vendor, so just use them as is.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static const struct cmd_set_entry manufacturer_cmd_set[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {0xFE, 0x0B},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {0x28, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {0x29, 0x4F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {0xFE, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {0x4B, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {0x4C, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {0x4D, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {0x4E, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {0x4F, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {0x50, 0xA0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {0x51, 0xC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {0x52, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {0x53, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {0xFE, 0x0D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {0x18, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {0x42, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {0x08, 0x41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {0x46, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {0x72, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {0xFE, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {0x24, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {0x04, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {0x1A, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {0x0F, 0x44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {0xFE, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {0x00, 0x0C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {0x05, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {0x06, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {0x08, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {0x09, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {0x0A, 0xE6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {0x0B, 0x8C},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {0x1A, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {0x1E, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {0x29, 0x93},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {0x2A, 0x93},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {0x2F, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {0x31, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {0x33, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {0x37, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {0x38, 0x2D},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {0x3A, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {0x3B, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {0x3D, 0x27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {0x3F, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {0x40, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {0x41, 0xE0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {0x4F, 0x2F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {0x50, 0x1E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {0xFE, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {0x00, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {0x05, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {0x07, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {0x08, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {0x0D, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {0x0F, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {0x32, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {0x37, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {0x39, 0x83},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {0x3A, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {0x41, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {0x43, 0x83},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {0x44, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {0x49, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {0x4B, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {0x4C, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {0x51, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {0x53, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {0x75, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {0x7A, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {0x7C, 0x83},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {0x7D, 0xCC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {0x82, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {0x84, 0x83},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {0x85, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {0x86, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {0x87, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {0x88, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {0x8A, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {0x8C, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {0x8D, 0xEA},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {0x8E, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {0x8F, 0xE8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {0xFE, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {0x90, 0x0A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {0x92, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {0x93, 0xA0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {0x94, 0xA8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {0x95, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {0x96, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {0x97, 0xFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {0x98, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {0x9A, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {0x9C, 0xA2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {0xAC, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {0xFE, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {0xB1, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {0xB2, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {0xB3, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {0xB4, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {0xB5, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {0xB6, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {0xB7, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {0xB8, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {0xB9, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {0xBA, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {0xBB, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {0xBC, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0xBD, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {0xBE, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0xBF, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {0xC0, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {0xC1, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {0xC2, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0xC3, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0xC4, 0x0F},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0xC5, 0x0E},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0xC6, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0xC7, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {0xC8, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {0xFE, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {0x95, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0x8D, 0xEE},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {0x44, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0x4C, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0x32, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {0x3A, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {0x7D, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0x75, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0x00, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0x08, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {0x85, 0xEC},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0xA6, 0x21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {0xA7, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {0xA9, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {0x82, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {0x41, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {0x7A, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {0x37, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {0x05, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {0x49, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {0x0D, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {0x51, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static const u32 rad_bus_formats[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MEDIA_BUS_FMT_RGB888_1X24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MEDIA_BUS_FMT_RGB666_1X18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) MEDIA_BUS_FMT_RGB565_1X16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static const u32 rad_bus_flags = DRM_BUS_FLAG_DE_LOW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct rad_panel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct drm_panel panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct mipi_dsi_device *dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct gpio_desc *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct backlight_device *backlight;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct regulator_bulk_data *supplies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) unsigned int num_supplies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) bool prepared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) bool enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const struct drm_display_mode default_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .clock = 132000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .hdisplay = 1080,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .hsync_start = 1080 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .hsync_end = 1080 + 20 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .htotal = 1080 + 20 + 2 + 34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .vdisplay = 1920,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .vsync_start = 1920 + 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .vsync_end = 1920 + 10 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .vtotal = 1920 + 10 + 2 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .width_mm = 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .height_mm = 121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .flags = DRM_MODE_FLAG_NHSYNC |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) DRM_MODE_FLAG_NVSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static inline struct rad_panel *to_rad_panel(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return container_of(panel, struct rad_panel, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int rad_panel_push_cmd_list(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) size_t i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) size_t count = ARRAY_SIZE(manufacturer_cmd_set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) for (i = 0; i < count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) const struct cmd_set_entry *entry = &manufacturer_cmd_set[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u8 buffer[2] = { entry->cmd, entry->param };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = mipi_dsi_generic_write(dsi, &buffer, sizeof(buffer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int color_format_from_dsi_format(enum mipi_dsi_pixel_format format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) switch (format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) case MIPI_DSI_FMT_RGB565:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return COL_FMT_16BPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) case MIPI_DSI_FMT_RGB666:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) case MIPI_DSI_FMT_RGB666_PACKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return COL_FMT_18BPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) case MIPI_DSI_FMT_RGB888:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return COL_FMT_24BPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return COL_FMT_24BPP; /* for backward compatibility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int rad_panel_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct rad_panel *rad = to_rad_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (rad->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = regulator_bulk_enable(rad->num_supplies, rad->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (rad->reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) gpiod_set_value_cansleep(rad->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) usleep_range(3000, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) gpiod_set_value_cansleep(rad->reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) usleep_range(18000, 20000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) rad->prepared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static int rad_panel_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct rad_panel *rad = to_rad_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (!rad->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * Right after asserting the reset, we need to release it, so that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * touch driver can have an active connection with the touch controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * even after the display is turned off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (rad->reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) gpiod_set_value_cansleep(rad->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) usleep_range(15000, 17000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) gpiod_set_value_cansleep(rad->reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ret = regulator_bulk_disable(rad->num_supplies, rad->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) rad->prepared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static int rad_panel_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct rad_panel *rad = to_rad_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) struct mipi_dsi_device *dsi = rad->dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) int color_format = color_format_from_dsi_format(dsi->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (rad->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) dsi->mode_flags |= MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ret = rad_panel_push_cmd_list(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) dev_err(dev, "Failed to send MCS (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* Select User Command Set table (CMD1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = mipi_dsi_generic_write(dsi, (u8[]){ WRMAUCCTR, 0x00 }, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* Software reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ret = mipi_dsi_dcs_soft_reset(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) dev_err(dev, "Failed to do Software Reset (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) usleep_range(15000, 17000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* Set DSI mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ret = mipi_dsi_generic_write(dsi, (u8[]){ 0xC2, 0x0B }, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) dev_err(dev, "Failed to set DSI mode (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* Set tear ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) dev_err(dev, "Failed to set tear ON (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* Set tear scanline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ret = mipi_dsi_dcs_set_tear_scanline(dsi, 0x380);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) dev_err(dev, "Failed to set tear scanline (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* Set pixel format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ret = mipi_dsi_dcs_set_pixel_format(dsi, color_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) dev_dbg(dev, "Interface color format set to 0x%x\n", color_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) dev_err(dev, "Failed to set pixel format (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* Exit sleep mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dev_err(dev, "Failed to exit sleep mode (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) usleep_range(5000, 7000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = mipi_dsi_dcs_set_display_on(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) dev_err(dev, "Failed to set display ON (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) backlight_enable(rad->backlight);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) rad->enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) gpiod_set_value_cansleep(rad->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static int rad_panel_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct rad_panel *rad = to_rad_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct mipi_dsi_device *dsi = rad->dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (!rad->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) dsi->mode_flags |= MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) backlight_disable(rad->backlight);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) usleep_range(10000, 12000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) ret = mipi_dsi_dcs_set_display_off(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dev_err(dev, "Failed to set display OFF (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) usleep_range(5000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) dev_err(dev, "Failed to enter sleep mode (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) rad->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static int rad_panel_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) mode = drm_mode_duplicate(connector->dev, &default_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) default_mode.hdisplay, default_mode.vdisplay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) drm_mode_vrefresh(&default_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) connector->display_info.width_mm = mode->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) connector->display_info.height_mm = mode->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) connector->display_info.bus_flags = rad_bus_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) drm_display_info_set_bus_formats(&connector->display_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) rad_bus_formats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) ARRAY_SIZE(rad_bus_formats));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static int rad_bl_get_brightness(struct backlight_device *bl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct mipi_dsi_device *dsi = bl_get_data(bl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) u16 brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (!rad->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) bl->props.brightness = brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return brightness & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static int rad_bl_update_status(struct backlight_device *bl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct mipi_dsi_device *dsi = bl_get_data(bl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (!rad->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) ret = mipi_dsi_dcs_set_display_brightness(dsi, bl->props.brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static const struct backlight_ops rad_bl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .update_status = rad_bl_update_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .get_brightness = rad_bl_get_brightness,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static const struct drm_panel_funcs rad_panel_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .prepare = rad_panel_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .unprepare = rad_panel_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .enable = rad_panel_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .disable = rad_panel_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .get_modes = rad_panel_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) static const char * const rad_supply_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) "v3p3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) "v1p8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static int rad_init_regulators(struct rad_panel *rad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) struct device *dev = &rad->dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) rad->num_supplies = ARRAY_SIZE(rad_supply_names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) rad->supplies = devm_kcalloc(dev, rad->num_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) sizeof(*rad->supplies), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (!rad->supplies)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) for (i = 0; i < rad->num_supplies; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) rad->supplies[i].supply = rad_supply_names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return devm_regulator_bulk_get(dev, rad->num_supplies, rad->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static int rad_panel_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct rad_panel *panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) struct backlight_properties bl_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u32 video_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) panel = devm_kzalloc(&dsi->dev, sizeof(*panel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (!panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) mipi_dsi_set_drvdata(dsi, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) panel->dsi = dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) ret = of_property_read_u32(np, "video-mode", &video_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) switch (video_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /* burst mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) dsi->mode_flags |= MIPI_DSI_MODE_VIDEO_BURST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /* non-burst mode with sync event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /* non-burst mode with sync pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) dsi->mode_flags |= MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) dev_warn(dev, "invalid video mode %d\n", video_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) ret = of_property_read_u32(np, "dsi-lanes", &dsi->lanes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dev_err(dev, "Failed to get dsi-lanes property (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) panel->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (IS_ERR(panel->reset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return PTR_ERR(panel->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) memset(&bl_props, 0, sizeof(bl_props));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) bl_props.type = BACKLIGHT_RAW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) bl_props.brightness = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) bl_props.max_brightness = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) panel->backlight = devm_backlight_device_register(dev, dev_name(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) dev, dsi, &rad_bl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) &bl_props);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (IS_ERR(panel->backlight)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) ret = PTR_ERR(panel->backlight);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) dev_err(dev, "Failed to register backlight (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ret = rad_init_regulators(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) drm_panel_init(&panel->panel, dev, &rad_panel_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) dev_set_drvdata(dev, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) drm_panel_add(&panel->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) drm_panel_remove(&panel->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int rad_panel_remove(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) ret = mipi_dsi_detach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) dev_err(dev, "Failed to detach from host (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) drm_panel_remove(&rad->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static void rad_panel_shutdown(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) struct rad_panel *rad = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) rad_panel_disable(&rad->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) rad_panel_unprepare(&rad->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static const struct of_device_id rad_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) { .compatible = "raydium,rm67191", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) MODULE_DEVICE_TABLE(of, rad_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static struct mipi_dsi_driver rad_panel_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .name = "panel-raydium-rm67191",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .of_match_table = rad_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .probe = rad_panel_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) .remove = rad_panel_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) .shutdown = rad_panel_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) module_mipi_dsi_driver(rad_panel_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) MODULE_AUTHOR("Robert Chiras <robert.chiras@nxp.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) MODULE_DESCRIPTION("DRM Driver for Raydium RM67191 MIPI DSI panel");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags