^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright © 2016-2017 Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Portions of this file (derived from panel-simple.c) are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * the rights to use, copy, modify, merge, publish, distribute, sub license,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * The above copyright notice and this permission notice (including the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * next paragraph) shall be included in all copies or substantial portions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Raspberry Pi 7" touchscreen panel driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * The 7" touchscreen consists of a DPI LCD panel, a Toshiba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * TC358762XBG DSI-DPI bridge, and an I2C-connected Atmel ATTINY88-MUR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * controlling power management, the LCD PWM, and initial register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * setup of the Tohsiba.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * This driver controls the TC358762 and ATTINY88, presenting a DSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * device with a drm_panel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/of_graph.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <drm/drm_crtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <drm/drm_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define RPI_DSI_DRIVER_NAME "rpi-ts-dsi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* I2C registers of the Atmel microcontroller. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) enum REG_ADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) REG_ID = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) REG_PORTA, /* BIT(2) for horizontal flip, BIT(3) for vertical flip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) REG_PORTB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) REG_PORTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) REG_PORTD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) REG_POWERON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) REG_PWM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) REG_DDRA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) REG_DDRB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) REG_DDRC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) REG_DDRD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) REG_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) REG_WR_ADDRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) REG_WR_ADDRH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) REG_READH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) REG_READL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) REG_WRITEH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) REG_WRITEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) REG_ID2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* DSI D-PHY Layer Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define D0W_DPHYCONTTX 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define CLW_DPHYCONTRX 0x0020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define D0W_DPHYCONTRX 0x0024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define D1W_DPHYCONTRX 0x0028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define COM_DPHYCONTRX 0x0038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define CLW_CNTRL 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define D0W_CNTRL 0x0044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define D1W_CNTRL 0x0048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define DFTMODE_CNTRL 0x0054
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* DSI PPI Layer Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define PPI_STARTPPI 0x0104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define PPI_BUSYPPI 0x0108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define PPI_LINEINITCNT 0x0110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PPI_LPTXTIMECNT 0x0114
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define PPI_CLS_ATMR 0x0140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define PPI_D0S_ATMR 0x0144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define PPI_D1S_ATMR 0x0148
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define PPI_D0S_CLRSIPOCOUNT 0x0164
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define PPI_D1S_CLRSIPOCOUNT 0x0168
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define CLS_PRE 0x0180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define D0S_PRE 0x0184
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define D1S_PRE 0x0188
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define CLS_PREP 0x01A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define D0S_PREP 0x01A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define D1S_PREP 0x01A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define CLS_ZERO 0x01C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define D0S_ZERO 0x01C4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define D1S_ZERO 0x01C8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define PPI_CLRFLG 0x01E0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define PPI_CLRSIPO 0x01E4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define HSTIMEOUT 0x01F0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define HSTIMEOUTENABLE 0x01F4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* DSI Protocol Layer Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define DSI_STARTDSI 0x0204
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define DSI_BUSYDSI 0x0208
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define DSI_LANEENABLE 0x0210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) # define DSI_LANEENABLE_CLOCK BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) # define DSI_LANEENABLE_D0 BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) # define DSI_LANEENABLE_D1 BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define DSI_LANESTATUS0 0x0214
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define DSI_LANESTATUS1 0x0218
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define DSI_INTSTATUS 0x0220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define DSI_INTMASK 0x0224
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define DSI_INTCLR 0x0228
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define DSI_LPTXTO 0x0230
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define DSI_MODE 0x0260
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define DSI_PAYLOAD0 0x0268
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define DSI_PAYLOAD1 0x026C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define DSI_SHORTPKTDAT 0x0270
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define DSI_SHORTPKTREQ 0x0274
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define DSI_BTASTA 0x0278
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define DSI_BTACLR 0x027C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* DSI General Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define DSIERRCNT 0x0300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define DSISIGMOD 0x0304
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* DSI Application Layer Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define APLCTRL 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define APLSTAT 0x0404
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define APLERR 0x0408
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define PWRMOD 0x040C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define RDPKTLN 0x0410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define PXLFMT 0x0414
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define MEMWRCMD 0x0418
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* LCDC/DPI Host Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define LCDCTRL 0x0420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define HSR 0x0424
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define HDISPR 0x0428
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define VSR 0x042C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define VDISPR 0x0430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define VFUEN 0x0434
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* DBI-B Host Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define DBIBCTRL 0x0440
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* SPI Master Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define SPICMR 0x0450
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define SPITCR 0x0454
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* System Controller Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define SYSSTAT 0x0460
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define SYSCTRL 0x0464
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define SYSPLL1 0x0468
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define SYSPLL2 0x046C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define SYSPLL3 0x0470
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define SYSPMCTRL 0x047C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* GPIO Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define GPIOC 0x0480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define GPIOO 0x0484
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define GPIOI 0x0488
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* I2C Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define I2CCLKCTRL 0x0490
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* Chip/Rev Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define IDREG 0x04A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Debug Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define WCMDQUEUE 0x0500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define RCMDQUEUE 0x0504
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct rpi_touchscreen {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct drm_panel base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct mipi_dsi_device *dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const struct drm_display_mode rpi_touchscreen_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* Modeline comes from the Raspberry Pi firmware, with HFP=1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * plugged in and clock re-computed from that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .clock = 25979400 / 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .hdisplay = 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .hsync_start = 800 + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .hsync_end = 800 + 1 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .htotal = 800 + 1 + 2 + 46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .vdisplay = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .vsync_start = 480 + 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .vsync_end = 480 + 7 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .vtotal = 480 + 7 + 2 + 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static struct rpi_touchscreen *panel_to_ts(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return container_of(panel, struct rpi_touchscreen, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int rpi_touchscreen_i2c_read(struct rpi_touchscreen *ts, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return i2c_smbus_read_byte_data(ts->i2c, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static void rpi_touchscreen_i2c_write(struct rpi_touchscreen *ts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = i2c_smbus_write_byte_data(ts->i2c, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev_err(&ts->dsi->dev, "I2C write failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static int rpi_touchscreen_write(struct rpi_touchscreen *ts, u16 reg, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) reg >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) val >> 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) val >> 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) val >> 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) mipi_dsi_generic_write(ts->dsi, msg, sizeof(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int rpi_touchscreen_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct rpi_touchscreen *ts = panel_to_ts(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) rpi_touchscreen_i2c_write(ts, REG_PWM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) rpi_touchscreen_i2c_write(ts, REG_POWERON, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int rpi_touchscreen_noop(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int rpi_touchscreen_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct rpi_touchscreen *ts = panel_to_ts(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) rpi_touchscreen_i2c_write(ts, REG_POWERON, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* Wait for nPWRDWN to go low to indicate poweron is done. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) for (i = 0; i < 100; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (rpi_touchscreen_i2c_read(ts, REG_PORTB) & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) rpi_touchscreen_write(ts, DSI_LANEENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) DSI_LANEENABLE_CLOCK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) DSI_LANEENABLE_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) rpi_touchscreen_write(ts, PPI_D0S_CLRSIPOCOUNT, 0x05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) rpi_touchscreen_write(ts, PPI_D1S_CLRSIPOCOUNT, 0x05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) rpi_touchscreen_write(ts, PPI_D0S_ATMR, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) rpi_touchscreen_write(ts, PPI_D1S_ATMR, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) rpi_touchscreen_write(ts, PPI_LPTXTIMECNT, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) rpi_touchscreen_write(ts, SPICMR, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) rpi_touchscreen_write(ts, LCDCTRL, 0x00100150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) rpi_touchscreen_write(ts, SYSCTRL, 0x040f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) rpi_touchscreen_write(ts, PPI_STARTPPI, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) rpi_touchscreen_write(ts, DSI_STARTDSI, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* Turn on the backlight. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) rpi_touchscreen_i2c_write(ts, REG_PWM, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* Default to the same orientation as the closed source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * firmware used for the panel. Runtime rotation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * configuration will be supported using VC4's plane
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * orientation bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) rpi_touchscreen_i2c_write(ts, REG_PORTA, BIT(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static int rpi_touchscreen_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) unsigned int i, num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static const u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) for (i = 0; i < ARRAY_SIZE(rpi_touchscreen_modes); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) const struct drm_display_mode *m = &rpi_touchscreen_modes[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mode = drm_mode_duplicate(connector->dev, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) m->hdisplay, m->vdisplay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) drm_mode_vrefresh(m));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) mode->type |= DRM_MODE_TYPE_DRIVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) mode->type |= DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) num++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) connector->display_info.bpc = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) connector->display_info.width_mm = 154;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) connector->display_info.height_mm = 86;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) drm_display_info_set_bus_formats(&connector->display_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) &bus_format, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static const struct drm_panel_funcs rpi_touchscreen_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .disable = rpi_touchscreen_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .unprepare = rpi_touchscreen_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .prepare = rpi_touchscreen_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .enable = rpi_touchscreen_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .get_modes = rpi_touchscreen_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static int rpi_touchscreen_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct device *dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct rpi_touchscreen *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct device_node *endpoint, *dsi_host_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct mipi_dsi_host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) int ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct mipi_dsi_device_info info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .type = RPI_DSI_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .node = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (!ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) i2c_set_clientdata(i2c, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ts->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) ver = rpi_touchscreen_i2c_read(ts, REG_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (ver < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) dev_err(dev, "Atmel I2C read failed: %d\n", ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) switch (ver) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) case 0xde: /* ver 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) case 0xc3: /* ver 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dev_err(dev, "Unknown Atmel firmware revision: 0x%02x\n", ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* Turn off at boot, so we can cleanly sequence powering on. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) rpi_touchscreen_i2c_write(ts, REG_POWERON, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* Look up the DSI host. It needs to probe before we do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (!endpoint)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) dsi_host_node = of_graph_get_remote_port_parent(endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (!dsi_host_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) host = of_find_mipi_dsi_host_by_node(dsi_host_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) of_node_put(dsi_host_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (!host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) of_node_put(endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) info.node = of_graph_get_remote_port(endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (!info.node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) of_node_put(endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ts->dsi = mipi_dsi_device_register_full(host, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (IS_ERR(ts->dsi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) dev_err(dev, "DSI device registration failed: %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) PTR_ERR(ts->dsi));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return PTR_ERR(ts->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) drm_panel_init(&ts->base, dev, &rpi_touchscreen_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* This appears last, as it's what will unblock the DSI host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) * driver's component bind function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) drm_panel_add(&ts->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) of_node_put(endpoint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static int rpi_touchscreen_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct rpi_touchscreen *ts = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) mipi_dsi_detach(ts->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) drm_panel_remove(&ts->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) mipi_dsi_device_unregister(ts->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static int rpi_touchscreen_dsi_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) dsi->mode_flags = (MIPI_DSI_MODE_VIDEO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) MIPI_DSI_MODE_LPM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) dsi->lanes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) dev_err(&dsi->dev, "failed to attach dsi to host: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static struct mipi_dsi_driver rpi_touchscreen_dsi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .driver.name = RPI_DSI_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .probe = rpi_touchscreen_dsi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static const struct of_device_id rpi_touchscreen_of_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) { .compatible = "raspberrypi,7inch-touchscreen-panel" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) { } /* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) MODULE_DEVICE_TABLE(of, rpi_touchscreen_of_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static struct i2c_driver rpi_touchscreen_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .name = "rpi_touchscreen",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .of_match_table = rpi_touchscreen_of_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .probe = rpi_touchscreen_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .remove = rpi_touchscreen_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static int __init rpi_touchscreen_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) mipi_dsi_driver_register(&rpi_touchscreen_dsi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return i2c_add_driver(&rpi_touchscreen_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) module_init(rpi_touchscreen_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static void __exit rpi_touchscreen_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) i2c_del_driver(&rpi_touchscreen_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) mipi_dsi_driver_unregister(&rpi_touchscreen_dsi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) module_exit(rpi_touchscreen_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) MODULE_DESCRIPTION("Raspberry Pi 7-inch touchscreen driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags