Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2022 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/pinctrl/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <video/videomode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <video/of_display_timing.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <video/display_timing.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <uapi/linux/media-bus-format.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <drm/drm_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <drm/drm_modes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct maxim_deserializer_panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) struct maxim_deserializer_panel_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	u16 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct drm_display_mode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	u32 width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	u32 height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		u8 dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	} deserializer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	void (*prepare)(struct maxim_deserializer_panel *p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	void (*unprepare)(struct maxim_deserializer_panel *p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	void (*enable)(struct maxim_deserializer_panel *p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	void (*disable)(struct maxim_deserializer_panel *p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) struct maxim_deserializer_panel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct drm_panel panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct gpio_desc *enable_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct pinctrl *pinctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct pinctrl_state *state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	/* the panel desc as detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	const struct maxim_deserializer_panel_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static void maxim_max96752f_panel_prepare(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	regmap_write(p->regmap, 0x0002, 0x43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	regmap_write(p->regmap, 0x0140, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	regmap_write(p->regmap, 0x01ce, 0x5e);	/* oldi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	regmap_write(p->regmap, 0x020c, 0x84);	/* bl_pwm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	regmap_write(p->regmap, 0x0206, 0x83);	/* tp_int */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	regmap_write(p->regmap, 0x0215, 0x90);	/* lcd_en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static void maxim_max96752f_panel_unprepare(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	regmap_write(p->regmap, 0x0215, 0x80);	/* lcd_en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static void maxim_max96752f_panel_enable(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	regmap_write(p->regmap, 0x0227, 0x90);	/* lcd_rst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	regmap_write(p->regmap, 0x020f, 0x90);	/* tp_rst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	regmap_write(p->regmap, 0x0221, 0x90);	/* lcd_stb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	regmap_write(p->regmap, 0x0212, 0x90);	/* bl_current_ctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	regmap_write(p->regmap, 0x0209, 0x90);	/* bl_en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static void maxim_max96752f_panel_disable(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	regmap_write(p->regmap, 0x0209, 0x80);  /* bl_en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	regmap_write(p->regmap, 0x0212, 0x80);	/* bl_current_ctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	regmap_write(p->regmap, 0x0221, 0x80);	/* lcd_stb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	regmap_write(p->regmap, 0x020f, 0x80);	/* tp_rst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	regmap_write(p->regmap, 0x0227, 0x80);	/* lcd_rst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) static const struct maxim_deserializer_panel_desc maxim_deserializer_default_panels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		.deserializer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			.name = "max96752f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			.addr = 0x48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			.dev_id = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		.mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			.clock = 148500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			.hdisplay = 1920,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			.hsync_start = 1920 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			.hsync_end = 1920 + 20 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			.htotal = 1920 + 20 + 20 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			.vdisplay = 1080,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			.vsync_start = 1080 + 250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			.vsync_end = 1080 + 250 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			.vtotal = 1080 + 250 + 2 + 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		.prepare = maxim_max96752f_panel_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		.enable = maxim_max96752f_panel_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		.disable = maxim_max96752f_panel_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		.unprepare = maxim_max96752f_panel_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static inline struct maxim_deserializer_panel *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) to_maxim_deserializer_panel(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return container_of(panel, struct maxim_deserializer_panel, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int maxim_deserializer_panel_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	struct maxim_deserializer_panel *p = to_maxim_deserializer_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (!p->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (p->desc->disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		p->desc->disable(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int maxim_deserializer_panel_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct maxim_deserializer_panel *p = to_maxim_deserializer_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (!p->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	if (p->desc->enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		p->desc->enable(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int maxim_deserializer_panel_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	struct maxim_deserializer_panel *p = to_maxim_deserializer_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (!p->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if (p->desc->unprepare)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		p->desc->unprepare(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static int maxim_deserializer_panel_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct maxim_deserializer_panel *p = to_maxim_deserializer_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	if (!p->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	if (!IS_ERR(p->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		pinctrl_select_state(p->pinctrl, p->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (p->desc->prepare)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		p->desc->prepare(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int maxim_deserializer_panel_get_id(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	/* TODO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static int maxim_deserializer_panel_detect(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct i2c_client *client = p->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	const struct maxim_deserializer_panel_desc *desc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	int id = maxim_deserializer_panel_get_id(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	if (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		/* TODO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		u32 dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		for (i = 0; i < ARRAY_SIZE(maxim_deserializer_default_panels); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			client->addr = maxim_deserializer_default_panels[i].deserializer.addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			ret = regmap_read(p->regmap, 0x000d, &dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			if (maxim_deserializer_default_panels[i].deserializer.dev_id == dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 				desc = &maxim_deserializer_default_panels[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	p->desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	p->state = pinctrl_lookup_state(p->pinctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			desc->name ? desc->name : desc->deserializer.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	client->addr = desc->deserializer.addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static int maxim_deserializer_panel_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 					      struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	struct maxim_deserializer_panel *p = to_maxim_deserializer_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	ret = maxim_deserializer_panel_detect(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	connector->display_info.width_mm = p->desc->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	connector->display_info.height_mm = p->desc->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	mode = drm_mode_duplicate(connector->dev, &p->desc->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	mode->width_mm = p->desc->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	mode->height_mm = p->desc->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const struct drm_panel_funcs maxim_deserializer_panel_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.disable = maxim_deserializer_panel_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	.unprepare = maxim_deserializer_panel_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	.prepare = maxim_deserializer_panel_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	.enable = maxim_deserializer_panel_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.get_modes = maxim_deserializer_panel_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static void maxim_deserializer_panel_power_on(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (p->enable_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		gpiod_direction_output(p->enable_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		msleep(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static void maxim_deserializer_panel_power_off(struct maxim_deserializer_panel *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	if (p->enable_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		gpiod_direction_output(p->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const struct regmap_range maxim_deserializer_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	regmap_reg_range(0x0000, 0x0003),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	regmap_reg_range(0x000d, 0x000e),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	regmap_reg_range(0x0010, 0x0010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	regmap_reg_range(0x0013, 0x0013),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	regmap_reg_range(0x0140, 0x0140),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	regmap_reg_range(0x01cd, 0x01d4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	regmap_reg_range(0x0200, 0x022f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const struct regmap_access_table maxim_deserializer_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	.yes_ranges = maxim_deserializer_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.n_yes_ranges = ARRAY_SIZE(maxim_deserializer_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static const struct regmap_config maxim_deserializer_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	.name = "maxim-deserializer-panel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.reg_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.max_register = 0xffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	.rd_table = &maxim_deserializer_readable_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static int maxim_deserializer_panel_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	struct maxim_deserializer_panel *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	if (!p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	p->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	p->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	i2c_set_clientdata(client, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	p->pinctrl = devm_pinctrl_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	if (IS_ERR(p->pinctrl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		return dev_err_probe(dev, PTR_ERR(p->pinctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 				     "failed to get pinctrl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	p->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_ASIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (IS_ERR(p->enable_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		return dev_err_probe(dev, PTR_ERR(p->enable_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 				     "failed to get enable GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	maxim_deserializer_panel_power_on(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	p->regmap = devm_regmap_init_i2c(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 					 &maxim_deserializer_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (IS_ERR(p->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		return dev_err_probe(dev, PTR_ERR(p->regmap),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 				     "failed to initialize regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	drm_panel_init(&p->panel, dev, &maxim_deserializer_panel_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		       DRM_MODE_CONNECTOR_LVDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	ret = drm_panel_of_backlight(&p->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	drm_panel_add(&p->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static int maxim_deserializer_panel_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	struct maxim_deserializer_panel *p = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	drm_panel_remove(&p->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static int __maybe_unused maxim_deserializer_panel_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	struct maxim_deserializer_panel *p = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	maxim_deserializer_panel_power_off(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static int __maybe_unused maxim_deserializer_panel_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	struct maxim_deserializer_panel *p = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	maxim_deserializer_panel_power_on(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static void maxim_deserializer_panel_shutdown(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	struct maxim_deserializer_panel *p = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	maxim_deserializer_panel_power_off(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static SIMPLE_DEV_PM_OPS(maxim_deserializer_panel_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 			 maxim_deserializer_panel_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 			 maxim_deserializer_panel_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static const struct of_device_id maxim_deserializer_panel_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	{ .compatible = "maxim,deserializer-panel" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MODULE_DEVICE_TABLE(of, maxim_deserializer_panel_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static struct i2c_driver maxim_deserializer_panel_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		.name = "maxim-deserializer-panel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		.of_match_table = maxim_deserializer_panel_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		.pm = &maxim_deserializer_panel_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	.probe_new = maxim_deserializer_panel_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	.remove = maxim_deserializer_panel_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	.shutdown = maxim_deserializer_panel_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) module_i2c_driver(maxim_deserializer_panel_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) MODULE_DESCRIPTION("Maxim deserializer panel driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) MODULE_LICENSE("GPL");