^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <video/mipi_display.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <drm/drm_crtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <drm/drm_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <drm/drm_modes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct panel_init_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) const char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define _INIT_CMD(...) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .len = sizeof((char[]){__VA_ARGS__}), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .data = (char[]){__VA_ARGS__} }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct panel_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) const struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int bpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) } size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) enum mipi_dsi_pixel_format format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) const struct panel_init_cmd *init_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned int lanes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) const char * const *supply_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned int num_supplies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned int sleep_mode_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) unsigned int power_down_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct innolux_panel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct drm_panel base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct mipi_dsi_device *link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) const struct panel_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct regulator_bulk_data *supplies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct gpio_desc *enable_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) bool prepared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bool enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline struct innolux_panel *to_innolux_panel(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return container_of(panel, struct innolux_panel, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int innolux_panel_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct innolux_panel *innolux = to_innolux_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!innolux->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) innolux->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int innolux_panel_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct innolux_panel *innolux = to_innolux_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!innolux->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) err = mipi_dsi_dcs_set_display_off(innolux->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) dev_err(panel->dev, "failed to set display off: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) err = mipi_dsi_dcs_enter_sleep_mode(innolux->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dev_err(panel->dev, "failed to enter sleep mode: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (innolux->desc->sleep_mode_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) msleep(innolux->desc->sleep_mode_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) gpiod_set_value_cansleep(innolux->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (innolux->desc->power_down_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) msleep(innolux->desc->power_down_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) err = regulator_bulk_disable(innolux->desc->num_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) innolux->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) innolux->prepared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int innolux_panel_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct innolux_panel *innolux = to_innolux_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (innolux->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) gpiod_set_value_cansleep(innolux->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) err = regulator_bulk_enable(innolux->desc->num_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) innolux->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* p079zca: t2 (20ms), p097pfg: t4 (15ms) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) usleep_range(20000, 21000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) gpiod_set_value_cansleep(innolux->enable_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* p079zca: t4, p097pfg: t5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) usleep_range(20000, 21000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (innolux->desc->init_cmds) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) const struct panel_init_cmd *cmds =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) innolux->desc->init_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) for (i = 0; cmds[i].len != 0; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) const struct panel_init_cmd *cmd = &cmds[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) err = mipi_dsi_generic_write(innolux->link, cmd->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) cmd->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_err(panel->dev, "failed to write command %u\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) goto poweroff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * Included by random guessing, because without this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * (or at least, some delay), the panel sometimes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * didn't appear to pick up the command sequence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) err = mipi_dsi_dcs_nop(innolux->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dev_err(panel->dev, "failed to send DCS nop: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) goto poweroff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) err = mipi_dsi_dcs_exit_sleep_mode(innolux->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_err(panel->dev, "failed to exit sleep mode: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) goto poweroff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* T6: 120ms - 1000ms*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) err = mipi_dsi_dcs_set_display_on(innolux->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev_err(panel->dev, "failed to set display on: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) goto poweroff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* T7: 5ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) usleep_range(5000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) innolux->prepared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) poweroff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) gpiod_set_value_cansleep(innolux->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) regulator_bulk_disable(innolux->desc->num_supplies, innolux->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int innolux_panel_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct innolux_panel *innolux = to_innolux_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (innolux->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) innolux->enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static const char * const innolux_p079zca_supply_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) "power",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const struct drm_display_mode innolux_p079zca_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .clock = 56900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .hdisplay = 768,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .hsync_start = 768 + 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .hsync_end = 768 + 40 + 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .htotal = 768 + 40 + 40 + 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .vdisplay = 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .vsync_start = 1024 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .vsync_end = 1024 + 20 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .vtotal = 1024 + 20 + 4 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static const struct panel_desc innolux_p079zca_panel_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .mode = &innolux_p079zca_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .bpc = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .size = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .width = 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .height = 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MIPI_DSI_MODE_LPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .format = MIPI_DSI_FMT_RGB888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .lanes = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .supply_names = innolux_p079zca_supply_names,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .num_supplies = ARRAY_SIZE(innolux_p079zca_supply_names),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .power_down_delay = 80, /* T8: 80ms - 1000ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static const char * const innolux_p097pfg_supply_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) "avdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) "avee",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const struct drm_display_mode innolux_p097pfg_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .clock = 229000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .hdisplay = 1536,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .hsync_start = 1536 + 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .hsync_end = 1536 + 100 + 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .htotal = 1536 + 100 + 24 + 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .vdisplay = 2048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .vsync_start = 2048 + 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .vsync_end = 2048 + 100 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .vtotal = 2048 + 100 + 2 + 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * Display manufacturer failed to provide init sequencing according to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/892065/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * so the init sequence stems from a register dump of a working panel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static const struct panel_init_cmd innolux_p097pfg_init_cmds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* page 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) _INIT_CMD(0xB1, 0xE8, 0x11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) _INIT_CMD(0xB2, 0x25, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) _INIT_CMD(0xB5, 0x08, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) _INIT_CMD(0xBC, 0x0F, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) _INIT_CMD(0xB8, 0x03, 0x06, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) _INIT_CMD(0xBD, 0x01, 0x90, 0x14, 0x14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) _INIT_CMD(0x6F, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) _INIT_CMD(0xC0, 0x03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) _INIT_CMD(0x6F, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) _INIT_CMD(0xC1, 0x0D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) _INIT_CMD(0xD9, 0x01, 0x09, 0x70),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) _INIT_CMD(0xC5, 0x12, 0x21, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) _INIT_CMD(0xBB, 0x93, 0x93),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* page 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) _INIT_CMD(0xB3, 0x3C, 0x3C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) _INIT_CMD(0xB4, 0x0F, 0x0F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) _INIT_CMD(0xB9, 0x45, 0x45),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) _INIT_CMD(0xBA, 0x14, 0x14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) _INIT_CMD(0xCA, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) _INIT_CMD(0xCE, 0x04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) _INIT_CMD(0xC3, 0x9B, 0x9B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) _INIT_CMD(0xD8, 0xC0, 0x03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) _INIT_CMD(0xBC, 0x82, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) _INIT_CMD(0xBD, 0x9E, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* page 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) _INIT_CMD(0xB0, 0x82),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) _INIT_CMD(0xD1, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x82, 0x00, 0xA5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 0x00, 0xC1, 0x00, 0xEA, 0x01, 0x0D, 0x01, 0x40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) _INIT_CMD(0xD2, 0x01, 0x6A, 0x01, 0xA8, 0x01, 0xDC, 0x02, 0x29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 0x02, 0x67, 0x02, 0x68, 0x02, 0xA8, 0x02, 0xF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) _INIT_CMD(0xD3, 0x03, 0x19, 0x03, 0x49, 0x03, 0x67, 0x03, 0x8C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 0x03, 0xA6, 0x03, 0xC7, 0x03, 0xDE, 0x03, 0xEC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) _INIT_CMD(0xD4, 0x03, 0xFF, 0x03, 0xFF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) _INIT_CMD(0xE0, 0x00, 0x00, 0x00, 0x86, 0x00, 0xC5, 0x00, 0xE5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 0x00, 0xFF, 0x01, 0x26, 0x01, 0x45, 0x01, 0x75),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) _INIT_CMD(0xE1, 0x01, 0x9C, 0x01, 0xD5, 0x02, 0x05, 0x02, 0x4D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 0x02, 0x86, 0x02, 0x87, 0x02, 0xC3, 0x03, 0x03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) _INIT_CMD(0xE2, 0x03, 0x2A, 0x03, 0x56, 0x03, 0x72, 0x03, 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 0x03, 0xAC, 0x03, 0xCB, 0x03, 0xE0, 0x03, 0xED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) _INIT_CMD(0xE3, 0x03, 0xFF, 0x03, 0xFF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* page 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) _INIT_CMD(0xB0, 0x00, 0x00, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) _INIT_CMD(0xB1, 0x00, 0x00, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) _INIT_CMD(0xB2, 0x00, 0x00, 0x06, 0x04, 0x01, 0x40, 0x85),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) _INIT_CMD(0xB3, 0x10, 0x07, 0xFC, 0x04, 0x01, 0x40, 0x80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) _INIT_CMD(0xB6, 0xF0, 0x08, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 0x40, 0x80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) _INIT_CMD(0xBA, 0xC5, 0x07, 0x00, 0x04, 0x11, 0x25, 0x8C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) _INIT_CMD(0xBB, 0xC5, 0x07, 0x00, 0x03, 0x11, 0x25, 0x8C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) _INIT_CMD(0xC0, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x80, 0x80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) _INIT_CMD(0xC1, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x80, 0x80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) _INIT_CMD(0xC4, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) _INIT_CMD(0xEF, 0x41),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* page 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) _INIT_CMD(0xEC, 0x4C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* page 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) _INIT_CMD(0xB0, 0x13, 0x03, 0x03, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) _INIT_CMD(0xB1, 0x30, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) _INIT_CMD(0xB2, 0x02, 0x02, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) _INIT_CMD(0xB3, 0x82, 0x23, 0x82, 0x9D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) _INIT_CMD(0xB4, 0xC5, 0x75, 0x24, 0x57),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) _INIT_CMD(0xB5, 0x00, 0xD4, 0x72, 0x11, 0x11, 0xAB, 0x0A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) _INIT_CMD(0xB6, 0x00, 0x00, 0xD5, 0x72, 0x24, 0x56),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) _INIT_CMD(0xB7, 0x5C, 0xDC, 0x5C, 0x5C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) _INIT_CMD(0xB9, 0x0C, 0x00, 0x00, 0x01, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) _INIT_CMD(0xC0, 0x75, 0x11, 0x11, 0x54, 0x05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) _INIT_CMD(0xC6, 0x00, 0x00, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) _INIT_CMD(0xD0, 0x00, 0x48, 0x08, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) _INIT_CMD(0xD1, 0x00, 0x48, 0x09, 0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /* page 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) _INIT_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) _INIT_CMD(0xB0, 0x02, 0x32, 0x32, 0x08, 0x2F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) _INIT_CMD(0xB1, 0x2E, 0x15, 0x14, 0x13, 0x12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) _INIT_CMD(0xB2, 0x11, 0x10, 0x00, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) _INIT_CMD(0xB3, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) _INIT_CMD(0xB4, 0x3D, 0x32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) _INIT_CMD(0xB5, 0x03, 0x32, 0x32, 0x09, 0x2F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) _INIT_CMD(0xB6, 0x2E, 0x1B, 0x1A, 0x19, 0x18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) _INIT_CMD(0xB7, 0x17, 0x16, 0x01, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) _INIT_CMD(0xB8, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) _INIT_CMD(0xB9, 0x3D, 0x32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) _INIT_CMD(0xC0, 0x01, 0x32, 0x32, 0x09, 0x2F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) _INIT_CMD(0xC1, 0x2E, 0x1A, 0x1B, 0x16, 0x17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) _INIT_CMD(0xC2, 0x18, 0x19, 0x03, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) _INIT_CMD(0xC3, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) _INIT_CMD(0xC4, 0x3D, 0x32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) _INIT_CMD(0xC5, 0x00, 0x32, 0x32, 0x08, 0x2F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) _INIT_CMD(0xC6, 0x2E, 0x14, 0x15, 0x10, 0x11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) _INIT_CMD(0xC7, 0x12, 0x13, 0x02, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) _INIT_CMD(0xC8, 0x3D, 0x3D, 0x3D, 0x3D, 0x3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) _INIT_CMD(0xC9, 0x3D, 0x32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static const struct panel_desc innolux_p097pfg_panel_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .mode = &innolux_p097pfg_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .bpc = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .size = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .width = 147,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .height = 196,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MIPI_DSI_MODE_LPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .format = MIPI_DSI_FMT_RGB888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .init_cmds = innolux_p097pfg_init_cmds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .lanes = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .supply_names = innolux_p097pfg_supply_names,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .num_supplies = ARRAY_SIZE(innolux_p097pfg_supply_names),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .sleep_mode_delay = 100, /* T15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static int innolux_panel_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct innolux_panel *innolux = to_innolux_panel(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) const struct drm_display_mode *m = innolux->desc->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) mode = drm_mode_duplicate(connector->dev, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) connector->display_info.width_mm = innolux->desc->size.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) connector->display_info.height_mm = innolux->desc->size.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) connector->display_info.bpc = innolux->desc->bpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static const struct drm_panel_funcs innolux_panel_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .disable = innolux_panel_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .unprepare = innolux_panel_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .prepare = innolux_panel_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .enable = innolux_panel_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .get_modes = innolux_panel_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static const struct of_device_id innolux_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) { .compatible = "innolux,p079zca",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .data = &innolux_p079zca_panel_desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) { .compatible = "innolux,p097pfg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .data = &innolux_p097pfg_panel_desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) MODULE_DEVICE_TABLE(of, innolux_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static int innolux_panel_add(struct mipi_dsi_device *dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) const struct panel_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct innolux_panel *innolux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) innolux = devm_kzalloc(dev, sizeof(*innolux), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (!innolux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) innolux->desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) innolux->supplies = devm_kcalloc(dev, desc->num_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) sizeof(*innolux->supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) if (!innolux->supplies)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) for (i = 0; i < desc->num_supplies; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) innolux->supplies[i].supply = desc->supply_names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) err = devm_regulator_bulk_get(dev, desc->num_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) innolux->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) innolux->enable_gpio = devm_gpiod_get_optional(dev, "enable",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (IS_ERR(innolux->enable_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) err = PTR_ERR(innolux->enable_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev_dbg(dev, "failed to get enable gpio: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) innolux->enable_gpio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) drm_panel_init(&innolux->base, dev, &innolux_panel_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) err = drm_panel_of_backlight(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) drm_panel_add(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) mipi_dsi_set_drvdata(dsi, innolux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) innolux->link = dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static void innolux_panel_del(struct innolux_panel *innolux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) drm_panel_remove(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static int innolux_panel_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) const struct panel_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) struct innolux_panel *innolux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) desc = of_device_get_match_data(&dsi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) dsi->mode_flags = desc->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) dsi->format = desc->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) dsi->lanes = desc->lanes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) err = innolux_panel_add(dsi, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) err = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) innolux = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) innolux_panel_del(innolux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static int innolux_panel_remove(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) err = drm_panel_unprepare(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) dev_err(&dsi->dev, "failed to unprepare panel: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) err = drm_panel_disable(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) dev_err(&dsi->dev, "failed to disable panel: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) err = mipi_dsi_detach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) innolux_panel_del(innolux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static void innolux_panel_shutdown(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) drm_panel_unprepare(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) drm_panel_disable(&innolux->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static struct mipi_dsi_driver innolux_panel_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .name = "panel-innolux-p079zca",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .of_match_table = innolux_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .probe = innolux_panel_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .remove = innolux_panel_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .shutdown = innolux_panel_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) module_mipi_dsi_driver(innolux_panel_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) MODULE_AUTHOR("Lin Huang <hl@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) MODULE_DESCRIPTION("Innolux P079ZCA panel driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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