^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2019-2020 Icenowy Zheng <icenowy@aosc.io>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <drm/drm_modes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define K101_IM2BA02_INIT_CMD_LEN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static const char * const regulator_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) "dvdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) "avdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) "cvdd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct k101_im2ba02 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct drm_panel panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct mipi_dsi_device *dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct regulator_bulk_data supplies[ARRAY_SIZE(regulator_names)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct gpio_desc *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static inline struct k101_im2ba02 *panel_to_k101_im2ba02(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return container_of(panel, struct k101_im2ba02, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct k101_im2ba02_init_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 data[K101_IM2BA02_INIT_CMD_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const struct k101_im2ba02_init_cmd k101_im2ba02_init_cmds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* Switch to page 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { .data = { 0xE0, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Seems to be some password */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { .data = { 0xE1, 0x93} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { .data = { 0xE2, 0x65 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { .data = { 0xE3, 0xF8 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Lane number, 0x02 - 3 lanes, 0x03 - 4 lanes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { .data = { 0x80, 0x03 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Sequence control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { .data = { 0x70, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { .data = { 0x71, 0x23 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { .data = { 0x72, 0x06 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Switch to page 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { .data = { 0xE0, 0x01 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Set VCOM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { .data = { 0x00, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { .data = { 0x01, 0x66 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Set VCOM_Reverse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { .data = { 0x03, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { .data = { 0x04, 0x25 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Set Gamma Power, VG[MS][PN] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { .data = { 0x17, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { .data = { 0x18, 0x6D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { .data = { 0x19, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { .data = { 0x1A, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { .data = { 0x1B, 0xBF } }, /* VGMN = -4.5V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { .data = { 0x1C, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* Set Gate Power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { .data = { 0x1F, 0x3E } }, /* VGH_R = 15V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) { .data = { 0x20, 0x28 } }, /* VGL_R = -11V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { .data = { 0x21, 0x28 } }, /* VGL_R2 = -11V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { .data = { 0x22, 0x0E } }, /* PA[6:4] = 0, PA[0] = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Set Panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) { .data = { 0x37, 0x09 } }, /* SS = 1, BGR = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* Set RGBCYC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { .data = { 0x38, 0x04 } }, /* JDT = 100 column inversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) { .data = { 0x39, 0x08 } }, /* RGB_N_EQ1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { .data = { 0x3A, 0x12 } }, /* RGB_N_EQ2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { .data = { 0x3C, 0x78 } }, /* set EQ3 for TE_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { .data = { 0x3D, 0xFF } }, /* set CHGEN_ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { .data = { 0x3E, 0xFF } }, /* set CHGEN_OFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { .data = { 0x3F, 0x7F } }, /* set CHGEN_OFF2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Set TCON parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) { .data = { 0x40, 0x06 } }, /* RSO = 800 points */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) { .data = { 0x41, 0xA0 } }, /* LN = 1280 lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Set power voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) { .data = { 0x55, 0x0F } }, /* DCDCM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) { .data = { 0x56, 0x01 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { .data = { 0x57, 0x69 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { .data = { 0x58, 0x0A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { .data = { 0x59, 0x0A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { .data = { 0x5A, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { .data = { 0x5B, 0x15 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* Set gamma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { .data = { 0x5D, 0x7C } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { .data = { 0x5E, 0x65 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { .data = { 0x5F, 0x55 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { .data = { 0x60, 0x49 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { .data = { 0x61, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { .data = { 0x62, 0x35 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { .data = { 0x63, 0x3A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { .data = { 0x64, 0x23 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { .data = { 0x65, 0x3D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { .data = { 0x66, 0x3C } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { .data = { 0x67, 0x3D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { .data = { 0x68, 0x5D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { .data = { 0x69, 0x4D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { .data = { 0x6A, 0x56 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { .data = { 0x6B, 0x48 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { .data = { 0x6C, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { .data = { 0x6D, 0x38 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { .data = { 0x6E, 0x25 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { .data = { 0x6F, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { .data = { 0x70, 0x7C } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { .data = { 0x71, 0x65 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { .data = { 0x72, 0x55 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { .data = { 0x73, 0x49 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { .data = { 0x74, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { .data = { 0x75, 0x35 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { .data = { 0x76, 0x3A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { .data = { 0x77, 0x23 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { .data = { 0x78, 0x3D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { .data = { 0x79, 0x3C } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { .data = { 0x7A, 0x3D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { .data = { 0x7B, 0x5D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { .data = { 0x7C, 0x4D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { .data = { 0x7D, 0x56 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { .data = { 0x7E, 0x48 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { .data = { 0x7F, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { .data = { 0x80, 0x38 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { .data = { 0x81, 0x25 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { .data = { 0x82, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* Switch to page 2, for GIP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { .data = { 0xE0, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { .data = { 0x00, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { .data = { 0x01, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { .data = { 0x02, 0x41 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { .data = { 0x03, 0x41 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { .data = { 0x04, 0x43 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { .data = { 0x05, 0x43 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { .data = { 0x06, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { .data = { 0x07, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { .data = { 0x08, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { .data = { 0x09, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { .data = { 0x0A, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { .data = { 0x0B, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { .data = { 0x0C, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { .data = { 0x0D, 0x47 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { .data = { 0x0E, 0x47 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) { .data = { 0x0F, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { .data = { 0x10, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) { .data = { 0x11, 0x4B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) { .data = { 0x12, 0x4B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) { .data = { 0x13, 0x49 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) { .data = { 0x14, 0x49 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { .data = { 0x15, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { .data = { 0x16, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { .data = { 0x17, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { .data = { 0x18, 0x40 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { .data = { 0x19, 0x40 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { .data = { 0x1A, 0x42 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { .data = { 0x1B, 0x42 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { .data = { 0x1C, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { .data = { 0x1D, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { .data = { 0x1E, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { .data = { 0x1F, 0x1f } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) { .data = { 0x20, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { .data = { 0x21, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { .data = { 0x22, 0x1f } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { .data = { 0x23, 0x46 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { .data = { 0x24, 0x46 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) { .data = { 0x25, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) { .data = { 0x26, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { .data = { 0x27, 0x4A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) { .data = { 0x28, 0x4A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) { .data = { 0x29, 0x48 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) { .data = { 0x2A, 0x48 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) { .data = { 0x2B, 0x1f } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) { .data = { 0x2C, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) { .data = { 0x2D, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) { .data = { 0x2E, 0x42 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) { .data = { 0x2F, 0x42 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { .data = { 0x30, 0x40 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) { .data = { 0x31, 0x40 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) { .data = { 0x32, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) { .data = { 0x33, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) { .data = { 0x34, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { .data = { 0x35, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) { .data = { 0x36, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { .data = { 0x37, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { .data = { 0x38, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { .data = { 0x39, 0x48 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { .data = { 0x3A, 0x48 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) { .data = { 0x3B, 0x4A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) { .data = { 0x3C, 0x4A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) { .data = { 0x3D, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) { .data = { 0x3E, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) { .data = { 0x3F, 0x46 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) { .data = { 0x40, 0x46 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) { .data = { 0x41, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) { .data = { 0x42, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) { .data = { 0x43, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) { .data = { 0x44, 0x43 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) { .data = { 0x45, 0x43 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) { .data = { 0x46, 0x41 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) { .data = { 0x47, 0x41 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) { .data = { 0x48, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) { .data = { 0x49, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) { .data = { 0x4A, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) { .data = { 0x4B, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) { .data = { 0x4C, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) { .data = { 0x4D, 0x1E } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) { .data = { 0x4E, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) { .data = { 0x4F, 0x49 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) { .data = { 0x50, 0x49 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) { .data = { 0x51, 0x4B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) { .data = { 0x52, 0x4B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) { .data = { 0x53, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) { .data = { 0x54, 0x45 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) { .data = { 0x55, 0x47 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) { .data = { 0x56, 0x47 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) { .data = { 0x57, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) { .data = { 0x58, 0x10 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) { .data = { 0x59, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) { .data = { 0x5A, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) { .data = { 0x5B, 0x30 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { .data = { 0x5C, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) { .data = { 0x5D, 0x40 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) { .data = { 0x5E, 0x01 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) { .data = { 0x5F, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) { .data = { 0x60, 0x30 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) { .data = { 0x61, 0x01 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) { .data = { 0x62, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) { .data = { 0x63, 0x6A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) { .data = { 0x64, 0x6A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) { .data = { 0x65, 0x05 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) { .data = { 0x66, 0x12 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) { .data = { 0x67, 0x74 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) { .data = { 0x68, 0x04 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) { .data = { 0x69, 0x6A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) { .data = { 0x6A, 0x6A } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) { .data = { 0x6B, 0x08 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) { .data = { 0x6C, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) { .data = { 0x6D, 0x04 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) { .data = { 0x6E, 0x04 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) { .data = { 0x6F, 0x88 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) { .data = { 0x70, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) { .data = { 0x71, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) { .data = { 0x72, 0x06 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) { .data = { 0x73, 0x7B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) { .data = { 0x74, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) { .data = { 0x75, 0x07 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) { .data = { 0x76, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) { .data = { 0x77, 0x5D } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) { .data = { 0x78, 0x17 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) { .data = { 0x79, 0x1F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) { .data = { 0x7A, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) { .data = { 0x7B, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) { .data = { 0x7C, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) { .data = { 0x7D, 0x03 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) { .data = { 0x7E, 0x7B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) { .data = { 0xE0, 0x04 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) { .data = { 0x2B, 0x2B } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) { .data = { 0x2E, 0x44 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) { .data = { 0xE0, 0x01 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) { .data = { 0x0E, 0x01 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) { .data = { 0xE0, 0x03 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) { .data = { 0x98, 0x2F } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) { .data = { 0xE0, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) { .data = { 0xE6, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) { .data = { 0xE7, 0x02 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) { .data = { 0x11, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const struct k101_im2ba02_init_cmd timed_cmds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) { .data = { 0x29, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) { .data = { 0x35, 0x00 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static int k101_im2ba02_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct k101_im2ba02 *ctx = panel_to_k101_im2ba02(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct mipi_dsi_device *dsi = ctx->dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) msleep(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) gpiod_set_value(ctx->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) gpiod_set_value(ctx->reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) gpiod_set_value(ctx->reset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) for (i = 0; i < ARRAY_SIZE(k101_im2ba02_init_cmds); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) const struct k101_im2ba02_init_cmd *cmd = &k101_im2ba02_init_cmds[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ret = mipi_dsi_dcs_write_buffer(dsi, cmd->data, K101_IM2BA02_INIT_CMD_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) goto powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) powerdown:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) gpiod_set_value(ctx->reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int k101_im2ba02_enable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct k101_im2ba02 *ctx = panel_to_k101_im2ba02(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) const struct k101_im2ba02_init_cmd *cmd = &timed_cmds[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ret = mipi_dsi_dcs_set_display_on(ctx->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return mipi_dsi_dcs_write_buffer(ctx->dsi, cmd->data, K101_IM2BA02_INIT_CMD_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static int k101_im2ba02_disable(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) struct k101_im2ba02 *ctx = panel_to_k101_im2ba02(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) return mipi_dsi_dcs_set_display_off(ctx->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int k101_im2ba02_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct k101_im2ba02 *ctx = panel_to_k101_im2ba02(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ret = mipi_dsi_dcs_set_display_off(ctx->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) dev_err(panel->dev, "failed to set display off: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) dev_err(panel->dev, "failed to enter sleep mode: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) gpiod_set_value(ctx->reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static const struct drm_display_mode k101_im2ba02_default_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .clock = 70000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .hdisplay = 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .hsync_start = 800 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .hsync_end = 800 + 20 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .htotal = 800 + 20 + 20 + 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .vdisplay = 1280,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .vsync_start = 1280 + 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .vsync_end = 1280 + 16 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .vtotal = 1280 + 16 + 4 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .width_mm = 136,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .height_mm = 217,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int k101_im2ba02_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct k101_im2ba02 *ctx = panel_to_k101_im2ba02(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) mode = drm_mode_duplicate(connector->dev, &k101_im2ba02_default_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) dev_err(&ctx->dsi->dev, "failed to add mode %ux%u@%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) k101_im2ba02_default_mode.hdisplay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) k101_im2ba02_default_mode.vdisplay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) drm_mode_vrefresh(&k101_im2ba02_default_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) connector->display_info.width_mm = mode->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) connector->display_info.height_mm = mode->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static const struct drm_panel_funcs k101_im2ba02_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .disable = k101_im2ba02_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .unprepare = k101_im2ba02_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .prepare = k101_im2ba02_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .enable = k101_im2ba02_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .get_modes = k101_im2ba02_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static int k101_im2ba02_dsi_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct k101_im2ba02 *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (!ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) mipi_dsi_set_drvdata(dsi, ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) ctx->dsi = dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) for (i = 0; i < ARRAY_SIZE(ctx->supplies); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ctx->supplies[i].supply = regulator_names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) ret = devm_regulator_bulk_get(&dsi->dev, ARRAY_SIZE(ctx->supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev_err(&dsi->dev, "Couldn't get regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (IS_ERR(ctx->reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) dev_err(&dsi->dev, "Couldn't get our reset GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return PTR_ERR(ctx->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) drm_panel_init(&ctx->panel, &dsi->dev, &k101_im2ba02_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) ret = drm_panel_of_backlight(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) drm_panel_add(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) dsi->mode_flags = MIPI_DSI_MODE_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) dsi->lanes = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static int k101_im2ba02_dsi_remove(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct k101_im2ba02 *ctx = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) mipi_dsi_detach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static const struct of_device_id k101_im2ba02_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) { .compatible = "feixin,k101-im2ba02", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MODULE_DEVICE_TABLE(of, k101_im2ba02_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) static struct mipi_dsi_driver k101_im2ba02_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .probe = k101_im2ba02_dsi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .remove = k101_im2ba02_dsi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .name = "feixin-k101-im2ba02",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .of_match_table = k101_im2ba02_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) module_mipi_dsi_driver(k101_im2ba02_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) MODULE_AUTHOR("Icenowy Zheng <icenowy@aosc.io>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) MODULE_DESCRIPTION("Feixin K101 IM2BA02 MIPI-DSI LCD panel");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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