Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Elida kd35t133 5.5" MIPI-DSI panel driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2020 Theobroma Systems Design und Consulting GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Rockteck jh057n00900 5.5" MIPI-DSI panel driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) Purism SPC 2019
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/media-bus-format.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <video/display_timing.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <video/mipi_display.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <drm/drm_modes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* Manufacturer specific Commands send via DSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define KD35T133_CMD_INTERFACEMODECTRL		0xb0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define KD35T133_CMD_FRAMERATECTRL		0xb1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define KD35T133_CMD_DISPLAYINVERSIONCTRL	0xb4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define KD35T133_CMD_DISPLAYFUNCTIONCTRL	0xb6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define KD35T133_CMD_POWERCONTROL1		0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define KD35T133_CMD_POWERCONTROL2		0xc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define KD35T133_CMD_VCOMCONTROL		0xc5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define KD35T133_CMD_POSITIVEGAMMA		0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define KD35T133_CMD_NEGATIVEGAMMA		0xe1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define KD35T133_CMD_SETIMAGEFUNCTION		0xe9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define KD35T133_CMD_ADJUSTCONTROL3		0xf7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) struct kd35t133 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct drm_panel panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct regulator *vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct regulator *iovcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	bool prepared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static inline struct kd35t133 *panel_to_kd35t133(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	return container_of(panel, struct kd35t133, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define dsi_dcs_write_seq(dsi, cmd, seq...) do {			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		static const u8 b[] = { cmd, seq };			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		int ret;						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b));	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		if (ret < 0)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			return ret;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static int kd35t133_init_sequence(struct kd35t133 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct device *dev = ctx->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	 * Init sequence was supplied by the panel vendor with minimal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	 * documentation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			  0x00, 0x13, 0x18, 0x04, 0x0f, 0x06, 0x3a, 0x56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			  0x4d, 0x03, 0x0a, 0x06, 0x30, 0x3e, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			  0x00, 0x13, 0x18, 0x01, 0x11, 0x06, 0x38, 0x34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			  0x4d, 0x06, 0x0d, 0x0b, 0x31, 0x37, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			  0x20, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 			  0xa9, 0x51, 0x2c, 0x82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_INVERT_MODE, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	dev_dbg(dev, "Panel init sequence done\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static int kd35t133_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	struct kd35t133 *ctx = panel_to_kd35t133(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (!ctx->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	ret = mipi_dsi_dcs_set_display_off(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		dev_err(ctx->dev, "failed to set display off: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	regulator_disable(ctx->iovcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	regulator_disable(ctx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	ctx->prepared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int kd35t133_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct kd35t133 *ctx = panel_to_kd35t133(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (ctx->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	dev_dbg(ctx->dev, "Resetting the panel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	ret = regulator_enable(ctx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		dev_err(ctx->dev, "Failed to enable vdd supply: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	ret = regulator_enable(ctx->iovcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		goto disable_vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	usleep_range(10, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		goto disable_iovcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	msleep(250);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	ret = kd35t133_init_sequence(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		goto disable_iovcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	ret = mipi_dsi_dcs_set_display_on(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		dev_err(ctx->dev, "Failed to set display on: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		goto disable_iovcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	ctx->prepared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) disable_iovcc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	regulator_disable(ctx->iovcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) disable_vdd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	regulator_disable(ctx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const struct drm_display_mode default_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.hdisplay	= 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.hsync_start	= 320 + 130,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.hsync_end	= 320 + 130 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.htotal		= 320 + 130 + 4 + 130,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	.vdisplay	= 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.vsync_start	= 480 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.vsync_end	= 480 + 2 + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.vtotal		= 480 + 2 + 1 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.clock		= 17000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.width_mm	= 42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.height_mm	= 82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int kd35t133_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	struct kd35t133 *ctx = panel_to_kd35t133(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	mode = drm_mode_duplicate(connector->dev, &default_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (!mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		dev_err(ctx->dev, "Failed to add mode %ux%u@%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			default_mode.hdisplay, default_mode.vdisplay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			drm_mode_vrefresh(&default_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	connector->display_info.width_mm = mode->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	connector->display_info.height_mm = mode->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct drm_panel_funcs kd35t133_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	.unprepare	= kd35t133_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.prepare	= kd35t133_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.get_modes	= kd35t133_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static int kd35t133_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	struct kd35t133 *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (!ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	if (IS_ERR(ctx->reset_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		dev_err(dev, "cannot get reset gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		return PTR_ERR(ctx->reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	ctx->vdd = devm_regulator_get(dev, "vdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (IS_ERR(ctx->vdd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		ret = PTR_ERR(ctx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			dev_err(dev, "Failed to request vdd regulator: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	ctx->iovcc = devm_regulator_get(dev, "iovcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	if (IS_ERR(ctx->iovcc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		ret = PTR_ERR(ctx->iovcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			dev_err(dev, "Failed to request iovcc regulator: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	mipi_dsi_set_drvdata(dsi, ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	ctx->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	dsi->lanes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			  MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			  MIPI_DSI_CLOCK_NON_CONTINUOUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	drm_panel_init(&ctx->panel, &dsi->dev, &kd35t133_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		       DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	ret = drm_panel_of_backlight(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	drm_panel_add(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		dev_err(dev, "mipi_dsi_attach failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void kd35t133_shutdown(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	struct kd35t133 *ctx = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	ret = drm_panel_unprepare(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		dev_err(&dsi->dev, "Failed to unprepare panel: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	ret = drm_panel_disable(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		dev_err(&dsi->dev, "Failed to disable panel: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static int kd35t133_remove(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	struct kd35t133 *ctx = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	kd35t133_shutdown(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	ret = mipi_dsi_detach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static const struct of_device_id kd35t133_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	{ .compatible = "elida,kd35t133" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MODULE_DEVICE_TABLE(of, kd35t133_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static struct mipi_dsi_driver kd35t133_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		.name = "panel-elida-kd35t133",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		.of_match_table = kd35t133_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.probe	= kd35t133_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.remove = kd35t133_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	.shutdown = kd35t133_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) module_mipi_dsi_driver(kd35t133_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_AUTHOR("Heiko Stuebner <heiko.stuebner@theobroma-systems.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MODULE_DESCRIPTION("DRM driver for Elida kd35t133 MIPI DSI panel");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MODULE_LICENSE("GPL v2");