^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/backlight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <drm/drm_modes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct tm5p5_nt35596 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct drm_panel panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct mipi_dsi_device *dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct regulator_bulk_data supplies[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) bool prepared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static inline struct tm5p5_nt35596 *to_tm5p5_nt35596(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) return container_of(panel, struct tm5p5_nt35596, panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define dsi_generic_write_seq(dsi, seq...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static const u8 d[] = { seq }; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) if (ret < 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define dsi_dcs_write_seq(dsi, seq...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static const u8 d[] = { seq }; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (ret < 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static void tm5p5_nt35596_reset(struct tm5p5_nt35596 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) gpiod_set_value_cansleep(ctx->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) gpiod_set_value_cansleep(ctx->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) gpiod_set_value_cansleep(ctx->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) usleep_range(15000, 16000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int tm5p5_nt35596_on(struct tm5p5_nt35596 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct mipi_dsi_device *dsi = ctx->dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dsi_generic_write_seq(dsi, 0xff, 0x05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) dsi_generic_write_seq(dsi, 0xfb, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) dsi_generic_write_seq(dsi, 0xc5, 0x31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dsi_generic_write_seq(dsi, 0xff, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) dsi_generic_write_seq(dsi, 0x01, 0x84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) dsi_generic_write_seq(dsi, 0x05, 0x25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) dsi_generic_write_seq(dsi, 0x06, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) dsi_generic_write_seq(dsi, 0x07, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) dsi_generic_write_seq(dsi, 0x08, 0x06);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) dsi_generic_write_seq(dsi, 0x09, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dsi_generic_write_seq(dsi, 0x0a, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) dsi_generic_write_seq(dsi, 0x0b, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dsi_generic_write_seq(dsi, 0x0c, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) dsi_generic_write_seq(dsi, 0x0d, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) dsi_generic_write_seq(dsi, 0x0e, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) dsi_generic_write_seq(dsi, 0x0f, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dsi_generic_write_seq(dsi, 0x10, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) dsi_generic_write_seq(dsi, 0x11, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) dsi_generic_write_seq(dsi, 0x12, 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) dsi_generic_write_seq(dsi, 0x17, 0xf3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) dsi_generic_write_seq(dsi, 0x18, 0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dsi_generic_write_seq(dsi, 0x19, 0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dsi_generic_write_seq(dsi, 0x1a, 0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dsi_generic_write_seq(dsi, 0x1b, 0xb3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) dsi_generic_write_seq(dsi, 0x1c, 0xb3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) dsi_generic_write_seq(dsi, 0x1d, 0xb3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dsi_generic_write_seq(dsi, 0x1e, 0xb3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) dsi_generic_write_seq(dsi, 0x1f, 0xb3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) dsi_generic_write_seq(dsi, 0x20, 0xb3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) dsi_generic_write_seq(dsi, 0xfb, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) dsi_generic_write_seq(dsi, 0xff, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) dsi_generic_write_seq(dsi, 0xfb, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) dsi_generic_write_seq(dsi, 0x35, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dsi_generic_write_seq(dsi, 0xd3, 0x06);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dsi_generic_write_seq(dsi, 0xd4, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) dsi_generic_write_seq(dsi, 0x5e, 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) dsi_generic_write_seq(dsi, 0x11, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) dsi_generic_write_seq(dsi, 0x29, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) dsi_generic_write_seq(dsi, 0x53, 0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int tm5p5_nt35596_off(struct tm5p5_nt35596 *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct mipi_dsi_device *dsi = ctx->dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = mipi_dsi_dcs_set_display_off(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) dev_err(dev, "Failed to set display off: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) msleep(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dsi_dcs_write_seq(dsi, 0x4f, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int tm5p5_nt35596_prepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct tm5p5_nt35596 *ctx = to_tm5p5_nt35596(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct device *dev = &ctx->dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (ctx->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_err(dev, "Failed to enable regulators: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) tm5p5_nt35596_reset(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ret = tm5p5_nt35596_on(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) dev_err(dev, "Failed to initialize panel: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) gpiod_set_value_cansleep(ctx->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) regulator_bulk_disable(ARRAY_SIZE(ctx->supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ctx->prepared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int tm5p5_nt35596_unprepare(struct drm_panel *panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct tm5p5_nt35596 *ctx = to_tm5p5_nt35596(panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct device *dev = &ctx->dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (!ctx->prepared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = tm5p5_nt35596_off(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) gpiod_set_value_cansleep(ctx->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) regulator_bulk_disable(ARRAY_SIZE(ctx->supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ctx->prepared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const struct drm_display_mode tm5p5_nt35596_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .clock = (1080 + 100 + 8 + 16) * (1920 + 4 + 2 + 4) * 60 / 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .hdisplay = 1080,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .hsync_start = 1080 + 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .hsync_end = 1080 + 100 + 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .htotal = 1080 + 100 + 8 + 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .vdisplay = 1920,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .vsync_start = 1920 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .vsync_end = 1920 + 4 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .vtotal = 1920 + 4 + 2 + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .width_mm = 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .height_mm = 121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int tm5p5_nt35596_get_modes(struct drm_panel *panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct drm_display_mode *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) mode = drm_mode_duplicate(connector->dev, &tm5p5_nt35596_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (!mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) drm_mode_set_name(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) connector->display_info.width_mm = mode->width_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) connector->display_info.height_mm = mode->height_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) drm_mode_probed_add(connector, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const struct drm_panel_funcs tm5p5_nt35596_panel_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .prepare = tm5p5_nt35596_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .unprepare = tm5p5_nt35596_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .get_modes = tm5p5_nt35596_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int tm5p5_nt35596_bl_update_status(struct backlight_device *bl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct mipi_dsi_device *dsi = bl_get_data(bl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u16 brightness = bl->props.brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (bl->props.power != FB_BLANK_UNBLANK ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) bl->props.fb_blank != FB_BLANK_UNBLANK ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) brightness = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = mipi_dsi_dcs_set_display_brightness(dsi, brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dsi->mode_flags |= MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int tm5p5_nt35596_bl_get_brightness(struct backlight_device *bl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct mipi_dsi_device *dsi = bl_get_data(bl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u16 brightness = bl->props.brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) dsi->mode_flags |= MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return brightness & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const struct backlight_ops tm5p5_nt35596_bl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .update_status = tm5p5_nt35596_bl_update_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .get_brightness = tm5p5_nt35596_bl_get_brightness,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static struct backlight_device *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) tm5p5_nt35596_create_backlight(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) const struct backlight_properties props = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .type = BACKLIGHT_RAW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .brightness = 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .max_brightness = 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) &tm5p5_nt35596_bl_ops, &props);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int tm5p5_nt35596_probe(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct device *dev = &dsi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct tm5p5_nt35596 *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (!ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ctx->supplies[0].supply = "vdd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ctx->supplies[1].supply = "vddio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) ctx->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) dev_err(dev, "Failed to get regulators: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (IS_ERR(ctx->reset_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ret = PTR_ERR(ctx->reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) dev_err(dev, "Failed to get reset-gpios: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ctx->dsi = dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) mipi_dsi_set_drvdata(dsi, ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) dsi->lanes = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_EOT_PACKET |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) drm_panel_init(&ctx->panel, dev, &tm5p5_nt35596_panel_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) DRM_MODE_CONNECTOR_DSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ctx->panel.backlight = tm5p5_nt35596_create_backlight(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (IS_ERR(ctx->panel.backlight)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ret = PTR_ERR(ctx->panel.backlight);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dev_err(dev, "Failed to create backlight: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) drm_panel_add(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static int tm5p5_nt35596_remove(struct mipi_dsi_device *dsi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct tm5p5_nt35596 *ctx = mipi_dsi_get_drvdata(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ret = mipi_dsi_detach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) dev_err(&dsi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) "Failed to detach from DSI host: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) drm_panel_remove(&ctx->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static const struct of_device_id tm5p5_nt35596_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) { .compatible = "asus,z00t-tm5p5-n35596" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MODULE_DEVICE_TABLE(of, tm5p5_nt35596_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static struct mipi_dsi_driver tm5p5_nt35596_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .probe = tm5p5_nt35596_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .remove = tm5p5_nt35596_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .name = "panel-tm5p5-nt35596",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .of_match_table = tm5p5_nt35596_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) module_mipi_dsi_driver(tm5p5_nt35596_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MODULE_AUTHOR("Konrad Dybcio <konradybcio@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MODULE_DESCRIPTION("DRM driver for tm5p5 nt35596 1080p video mode dsi panel");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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