Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Copyright 2011 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * The above copyright notice and this permission notice (including the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * paragraph) shall be included in all copies or substantial portions of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include "psb_drv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include "psb_intel_reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define PCI_ASLE 0xe4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define PCI_ASLS 0xfc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define OPREGION_HEADER_OFFSET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define OPREGION_ACPI_OFFSET   0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define   ACPI_CLID 0x01ac /* current lid state indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define   ACPI_CDCK 0x01b0 /* current docking state indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define OPREGION_SWSCI_OFFSET  0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define OPREGION_ASLE_OFFSET   0x300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define OPREGION_VBT_OFFSET    0x400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define OPREGION_SIGNATURE "IntelGraphicsMem"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define MBOX_ACPI      (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define MBOX_SWSCI     (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define MBOX_ASLE      (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) struct opregion_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u8 signature[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	u32 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	u32 opregion_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u8 bios_ver[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u8 vbios_ver[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	u8 driver_ver[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u32 mboxes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 reserved[164];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /* OpRegion mailbox #1: public ACPI methods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) struct opregion_acpi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u32 drdy;	/* driver readiness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32 csts;	/* notification status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u32 cevt;	/* current event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	u8 rsvd1[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	u32 didl[8];	/* supported display devices ID list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u32 cpdl[8];	/* currently presented display list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u32 cadl[8];	/* currently active display list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	u32 nadl[8];	/* next active devices list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u32 aslp;	/* ASL sleep time-out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u32 tidx;	/* toggle table index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u32 chpd;	/* current hotplug enable indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u32 clid;	/* current lid state*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	u32 cdck;	/* current docking state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u32 sxsw;	/* Sx state resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u32 evts;	/* ASL supported events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u32 cnot;	/* current OS notification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u32 nrdy;	/* driver status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	u8 rsvd2[60];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /* OpRegion mailbox #2: SWSCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) struct opregion_swsci {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	/*FIXME: add it later*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) /* OpRegion mailbox #3: ASLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) struct opregion_asle {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	u32 ardy;	/* driver readiness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u32 aslc;	/* ASLE interrupt command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	u32 tche;	/* technology enabled indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u32 alsi;	/* current ALS illuminance reading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	u32 bclp;	/* backlight brightness to set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	u32 pfit;	/* panel fitting state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	u32 cblv;	/* current brightness level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	u16 bclm[20];	/* backlight level duty cycle mapping table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	u32 cpfm;	/* current panel fitting mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	u32 epfm;	/* enabled panel fitting modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	u8 plut[74];	/* panel LUT and identifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	u32 pfmb;	/* PWM freq and min brightness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	u8 rsvd[102];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) /* ASLE irq request bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define ASLE_SET_ALS_ILLUM     (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define ASLE_SET_BACKLIGHT     (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define ASLE_SET_PFIT          (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define ASLE_SET_PWM_FREQ      (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define ASLE_REQ_MSK           0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* response bits of ASLE irq request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define ASLE_ALS_ILLUM_FAILED   (1<<10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define ASLE_BACKLIGHT_FAILED   (1<<12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define ASLE_PFIT_FAILED        (1<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define ASLE_PWM_FREQ_FAILED    (1<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* ASLE backlight brightness to set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define ASLE_BCLP_VALID                (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define ASLE_BCLP_MSK          (~(1<<31))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* ASLE panel fitting request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define ASLE_PFIT_VALID         (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define ASLE_PFIT_CENTER (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define ASLE_PFIT_STRETCH_TEXT (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define ASLE_PFIT_STRETCH_GFX (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* response bits of ASLE irq request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define ASLE_ALS_ILLUM_FAILED	(1<<10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define ASLE_BACKLIGHT_FAILED	(1<<12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define ASLE_PFIT_FAILED	(1<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define ASLE_PWM_FREQ_FAILED	(1<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* ASLE backlight brightness to set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define ASLE_BCLP_VALID                (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define ASLE_BCLP_MSK          (~(1<<31))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* ASLE panel fitting request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define ASLE_PFIT_VALID         (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define ASLE_PFIT_CENTER (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define ASLE_PFIT_STRETCH_TEXT (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define ASLE_PFIT_STRETCH_GFX (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* PWM frequency and minimum brightness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define ASLE_PFMB_PWM_VALID (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define ASLE_CBLV_VALID         (1<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct psb_intel_opregion *system_opregion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	struct drm_psb_private *dev_priv = dev->dev_private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct opregion_asle *asle = dev_priv->opregion.asle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct backlight_device *bd = dev_priv->backlight_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	DRM_DEBUG_DRIVER("asle set backlight %x\n", bclp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (!(bclp & ASLE_BCLP_VALID))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		return ASLE_BACKLIGHT_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (bd == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return ASLE_BACKLIGHT_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	bclp &= ASLE_BCLP_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (bclp > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		return ASLE_BACKLIGHT_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	gma_backlight_set(dev, bclp * bd->props.max_brightness / 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	asle->cblv = (bclp * 0x64) / 0xff | ASLE_CBLV_VALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static void psb_intel_opregion_asle_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct psb_intel_opregion *opregion =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		container_of(work, struct psb_intel_opregion, asle_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct drm_psb_private *dev_priv =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		container_of(opregion, struct drm_psb_private, opregion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct opregion_asle *asle = opregion->asle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	u32 asle_stat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	u32 asle_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (!asle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	asle_req = asle->aslc & ASLE_REQ_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (!asle_req) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		DRM_DEBUG_DRIVER("non asle set request??\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (asle_req & ASLE_SET_BACKLIGHT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		asle_stat |= asle_set_backlight(dev_priv->dev, asle->bclp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	asle->aslc = asle_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) void psb_intel_opregion_asle_intr(struct drm_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	struct drm_psb_private *dev_priv = dev->dev_private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	if (dev_priv->opregion.asle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		schedule_work(&dev_priv->opregion.asle_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define ASLE_ALS_EN    (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define ASLE_BLC_EN    (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define ASLE_PFIT_EN   (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define ASLE_PFMB_EN   (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) void psb_intel_opregion_enable_asle(struct drm_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct drm_psb_private *dev_priv = dev->dev_private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct opregion_asle *asle = dev_priv->opregion.asle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (asle && system_opregion ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		/* Don't do this on Medfield or other non PC like devices, they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		   use the bit for something different altogether */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		psb_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 								| ASLE_PFMB_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		asle->ardy = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define ACPI_EV_DISPLAY_SWITCH (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define ACPI_EV_LID            (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define ACPI_EV_DOCK           (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int psb_intel_opregion_video_event(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 					  unsigned long val, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	/* The only video events relevant to opregion are 0x80. These indicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	   either a docking event, lid switch or display switch request. In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	   Linux, these are handled by the dock, button and video drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	   We might want to fix the video driver to be opregion-aware in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	   future, but right now we just indicate to the firmware that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	   request has been handled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct opregion_acpi *acpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (!system_opregion)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	acpi = system_opregion->acpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	acpi->csts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return NOTIFY_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static struct notifier_block psb_intel_opregion_notifier = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	.notifier_call = psb_intel_opregion_video_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) void psb_intel_opregion_init(struct drm_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	struct drm_psb_private *dev_priv = dev->dev_private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	struct psb_intel_opregion *opregion = &dev_priv->opregion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (!opregion->header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (opregion->acpi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		/* Notify BIOS we are ready to handle ACPI video ext notifs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		 * Right now, all the events are handled by the ACPI video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		 * module. We don't actually need to do anything with them. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		opregion->acpi->csts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		opregion->acpi->drdy = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		system_opregion = opregion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		register_acpi_notifier(&psb_intel_opregion_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) void psb_intel_opregion_fini(struct drm_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	struct drm_psb_private *dev_priv = dev->dev_private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	struct psb_intel_opregion *opregion = &dev_priv->opregion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if (!opregion->header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	if (opregion->acpi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		opregion->acpi->drdy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		system_opregion = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		unregister_acpi_notifier(&psb_intel_opregion_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	cancel_work_sync(&opregion->asle_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	/* just clear all opregion memory pointers now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	iounmap(opregion->header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	opregion->header = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	opregion->acpi = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	opregion->swsci = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	opregion->asle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	opregion->vbt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int psb_intel_opregion_setup(struct drm_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	struct drm_psb_private *dev_priv = dev->dev_private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	struct psb_intel_opregion *opregion = &dev_priv->opregion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	u32 opregion_phy, mboxes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	pci_read_config_dword(dev->pdev, PCI_ASLS, &opregion_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	if (opregion_phy == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		DRM_DEBUG_DRIVER("ACPI Opregion not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	INIT_WORK(&opregion->asle_work, psb_intel_opregion_asle_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	DRM_DEBUG("OpRegion detected at 0x%8x\n", opregion_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	base = acpi_os_ioremap(opregion_phy, 8*1024);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	if (!base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	if (memcmp(base, OPREGION_SIGNATURE, 16)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		DRM_DEBUG_DRIVER("opregion signature mismatch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	opregion->header = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	opregion->vbt = base + OPREGION_VBT_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	opregion->lid_state = base + ACPI_CLID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	mboxes = opregion->header->mboxes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (mboxes & MBOX_ACPI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		opregion->acpi = base + OPREGION_ACPI_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	if (mboxes & MBOX_ASLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		DRM_DEBUG_DRIVER("ASLE supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		opregion->asle = base + OPREGION_ASLE_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	iounmap(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)