Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2016 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Author: Jyri Sarha <jsarha@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/of_graph.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <drm/drm_atomic_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <drm/drm_bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <drm/drm_crtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <drm/drm_print.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <drm/drm_probe_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define HOTPLUG_DEBOUNCE_MS		1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) struct tfp410 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct drm_bridge	bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct drm_connector	connector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	u32			bus_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct delayed_work	hpd_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct gpio_desc	*powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct drm_bridge_timings timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct drm_bridge	*next_bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static inline struct tfp410 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) drm_bridge_to_tfp410(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return container_of(bridge, struct tfp410, bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static inline struct tfp410 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) drm_connector_to_tfp410(struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	return container_of(connector, struct tfp410, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static int tfp410_get_modes(struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct tfp410 *dvi = drm_connector_to_tfp410(connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct edid *edid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	if (dvi->next_bridge->ops & DRM_BRIDGE_OP_EDID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		edid = drm_bridge_get_edid(dvi->next_bridge, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		if (!edid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			DRM_INFO("EDID read failed. Fallback to standard modes\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		edid = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	if (!edid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		 * No EDID, fallback on the XGA standard modes and prefer a mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		 * pretty much anything can handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		ret = drm_add_modes_noedid(connector, 1920, 1200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		drm_set_preferred_mode(connector, 1024, 768);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	drm_connector_update_edid_property(connector, edid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	ret = drm_add_edid_modes(connector, edid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	kfree(edid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static const struct drm_connector_helper_funcs tfp410_con_helper_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.get_modes	= tfp410_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static enum drm_connector_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) tfp410_connector_detect(struct drm_connector *connector, bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct tfp410 *dvi = drm_connector_to_tfp410(connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	return drm_bridge_detect(dvi->next_bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static const struct drm_connector_funcs tfp410_con_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	.detect			= tfp410_connector_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	.fill_modes		= drm_helper_probe_single_connector_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.destroy		= drm_connector_cleanup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.reset			= drm_atomic_helper_connector_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.atomic_duplicate_state	= drm_atomic_helper_connector_duplicate_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.atomic_destroy_state	= drm_atomic_helper_connector_destroy_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void tfp410_hpd_work_func(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct tfp410 *dvi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	dvi = container_of(work, struct tfp410, hpd_work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (dvi->bridge.dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		drm_helper_hpd_irq_event(dvi->bridge.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void tfp410_hpd_callback(void *arg, enum drm_connector_status status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	struct tfp410 *dvi = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	mod_delayed_work(system_wq, &dvi->hpd_work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			 msecs_to_jiffies(HOTPLUG_DEBOUNCE_MS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int tfp410_attach(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			 enum drm_bridge_attach_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct tfp410 *dvi = drm_bridge_to_tfp410(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	ret = drm_bridge_attach(bridge->encoder, dvi->next_bridge, bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (!bridge->encoder) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		dev_err(dvi->dev, "Missing encoder\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (dvi->next_bridge->ops & DRM_BRIDGE_OP_DETECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		dvi->connector.polled = DRM_CONNECTOR_POLL_HPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		dvi->connector.polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (dvi->next_bridge->ops & DRM_BRIDGE_OP_HPD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		INIT_DELAYED_WORK(&dvi->hpd_work, tfp410_hpd_work_func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		drm_bridge_hpd_enable(dvi->next_bridge, tfp410_hpd_callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 				      dvi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	drm_connector_helper_add(&dvi->connector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 				 &tfp410_con_helper_funcs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	ret = drm_connector_init_with_ddc(bridge->dev, &dvi->connector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 					  &tfp410_con_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 					  dvi->next_bridge->type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 					  dvi->next_bridge->ddc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		dev_err(dvi->dev, "drm_connector_init_with_ddc() failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	drm_display_info_set_bus_formats(&dvi->connector.display_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 					 &dvi->bus_format, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	drm_connector_attach_encoder(&dvi->connector, bridge->encoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static void tfp410_detach(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct tfp410 *dvi = drm_bridge_to_tfp410(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	if (dvi->connector.dev && dvi->next_bridge->ops & DRM_BRIDGE_OP_HPD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		drm_bridge_hpd_disable(dvi->next_bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		cancel_delayed_work_sync(&dvi->hpd_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static void tfp410_enable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct tfp410 *dvi = drm_bridge_to_tfp410(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	gpiod_set_value_cansleep(dvi->powerdown, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static void tfp410_disable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct tfp410 *dvi = drm_bridge_to_tfp410(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	gpiod_set_value_cansleep(dvi->powerdown, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static enum drm_mode_status tfp410_mode_valid(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 					      const struct drm_display_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 					      const struct drm_display_mode *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (mode->clock < 25000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return MODE_CLOCK_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (mode->clock > 165000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return MODE_CLOCK_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	return MODE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct drm_bridge_funcs tfp410_bridge_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.attach		= tfp410_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.detach		= tfp410_detach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.enable		= tfp410_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.disable	= tfp410_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.mode_valid	= tfp410_mode_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static const struct drm_bridge_timings tfp410_default_timings = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	.input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			 | DRM_BUS_FLAG_DE_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	.setup_time_ps = 1200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	.hold_time_ps = 1300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct drm_bridge_timings *timings = &dvi->timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct device_node *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	u32 pclk_sample = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	u32 bus_width = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	u32 deskew = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	/* Start with defaults. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	*timings = tfp410_default_timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		 * In I2C mode timings are configured through the I2C interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		 * As the driver doesn't support I2C configuration yet, we just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		 * go with the defaults (BSEL=1, DSEL=1, DKEN=0, EDGE=1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	 * In non-I2C mode, timings are configured through the BSEL, DSEL, DKEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	 * and EDGE pins. They are specified in DT through endpoint properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	 * and vendor-specific properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	ep = of_graph_get_endpoint_by_regs(dvi->dev->of_node, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (!ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	/* Get the sampling edge from the endpoint. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	of_property_read_u32(ep, "pclk-sample", &pclk_sample);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	of_property_read_u32(ep, "bus-width", &bus_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	of_node_put(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	timings->input_bus_flags = DRM_BUS_FLAG_DE_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	switch (pclk_sample) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		timings->input_bus_flags |= DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 					 |  DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		timings->input_bus_flags |= DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 					 |  DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	switch (bus_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		dvi->bus_format = MEDIA_BUS_FMT_RGB888_2X12_LE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	case 24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		dvi->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	/* Get the setup and hold time from vendor-specific properties. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	of_property_read_u32(dvi->dev->of_node, "ti,deskew", &deskew);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	if (deskew > 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	timings->setup_time_ps = 1200 - 350 * ((s32)deskew - 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	timings->hold_time_ps = max(0, 1300 + 350 * ((s32)deskew - 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int tfp410_init(struct device *dev, bool i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	struct tfp410 *dvi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	if (!dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		dev_err(dev, "device-tree data is missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	dvi = devm_kzalloc(dev, sizeof(*dvi), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	if (!dvi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	dvi->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	dev_set_drvdata(dev, dvi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	dvi->bridge.funcs = &tfp410_bridge_funcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	dvi->bridge.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	dvi->bridge.timings = &dvi->timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	dvi->bridge.type = DRM_MODE_CONNECTOR_DVID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	ret = tfp410_parse_timings(dvi, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	/* Get the next bridge, connected to port@1. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	node = of_graph_get_remote_node(dev->of_node, 1, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	dvi->next_bridge = of_drm_find_bridge(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (!dvi->next_bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	/* Get the powerdown GPIO. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	dvi->powerdown = devm_gpiod_get_optional(dev, "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 						 GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (IS_ERR(dvi->powerdown)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		dev_err(dev, "failed to parse powerdown gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		return PTR_ERR(dvi->powerdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	/*  Register the DRM bridge. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	drm_bridge_add(&dvi->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static int tfp410_fini(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	struct tfp410 *dvi = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	drm_bridge_remove(&dvi->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int tfp410_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	return tfp410_init(&pdev->dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int tfp410_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	return tfp410_fini(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const struct of_device_id tfp410_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	{ .compatible = "ti,tfp410" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) MODULE_DEVICE_TABLE(of, tfp410_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static struct platform_driver tfp410_platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	.probe	= tfp410_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	.remove	= tfp410_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		.name		= "tfp410-bridge",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		.of_match_table	= tfp410_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #if IS_ENABLED(CONFIG_I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* There is currently no i2c functionality. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static int tfp410_i2c_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 			    const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	if (!client->dev.of_node ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	    of_property_read_u32(client->dev.of_node, "reg", &reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 			"Can't get i2c reg property from device-tree\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	return tfp410_init(&client->dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int tfp410_i2c_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	return tfp410_fini(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const struct i2c_device_id tfp410_i2c_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	{ "tfp410", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) MODULE_DEVICE_TABLE(i2c, tfp410_i2c_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static struct i2c_driver tfp410_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		.name	= "tfp410",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		.of_match_table = of_match_ptr(tfp410_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	.id_table	= tfp410_i2c_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	.probe		= tfp410_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	.remove		= tfp410_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #endif /* IS_ENABLED(CONFIG_I2C) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	uint i2c:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	uint platform:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }  tfp410_registered_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int __init tfp410_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #if IS_ENABLED(CONFIG_I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	ret = i2c_add_driver(&tfp410_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		pr_err("%s: registering i2c driver failed: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 		       __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		tfp410_registered_driver.i2c = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	ret = platform_driver_register(&tfp410_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 		pr_err("%s: registering platform driver failed: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		       __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		tfp410_registered_driver.platform = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	if (tfp410_registered_driver.i2c ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	    tfp410_registered_driver.platform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) module_init(tfp410_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static void __exit tfp410_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #if IS_ENABLED(CONFIG_I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	if (tfp410_registered_driver.i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 		i2c_del_driver(&tfp410_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	if (tfp410_registered_driver.platform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		platform_driver_unregister(&tfp410_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) module_exit(tfp410_module_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) MODULE_DESCRIPTION("TI TFP410 DVI bridge driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) MODULE_LICENSE("GPL");