Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) Rockchip Electronics Co.Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *      Guochun Huang <hero.huang@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <drm/drm_bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <drm/drm_atomic_state_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <drm/drm_mipi_dsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <drm/drm_modeset_helper_vtables.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <drm/drm_of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <drm/drm_print.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <drm/drm_probe_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) struct serdes_init_seq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct reg_sequence *reg_sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	unsigned int reg_seq_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) struct bu18tl82 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct drm_bridge base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct drm_bridge *bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct mipi_dsi_device *dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct device_node *dsi_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct serdes_init_seq *serdes_init_seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	bool sel_mipi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct regulator *supply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct gpio_desc *enable_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static const struct regmap_config bu18tl82_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	.name = "bu18tl82",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.reg_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.max_register = 0x0700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static struct bu18tl82 *bridge_to_bu18tl82(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	return container_of(bridge, struct bu18tl82, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static int bu18tl82_parse_init_seq(struct device *dev, const u16 *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 				   int length, struct serdes_init_seq *seq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct reg_sequence *reg_sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u16 *buf, *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	unsigned int i, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	if (!seq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	buf = devm_kmemdup(dev, data, length, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	d = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	cnt = length / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	seq->reg_seq_cnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	seq->reg_sequence = devm_kcalloc(dev, cnt, sizeof(struct reg_sequence), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (!seq->reg_sequence)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	for (i = 0; i < cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		reg_sequence = &seq->reg_sequence[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		reg_sequence->reg = get_unaligned_be16(&d[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		reg_sequence->def = get_unaligned_be16(&d[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		d += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static int bu18tl82_get_init_seq(struct bu18tl82 *bu18tl82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct device *dev = bu18tl82->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	const void *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	int len, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	data = of_get_property(np, "serdes-init-sequence", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (!data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		dev_err(dev, "failed to get serdes-init-sequence\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	bu18tl82->serdes_init_seq = devm_kzalloc(dev, sizeof(*bu18tl82->serdes_init_seq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 						 GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (!bu18tl82->serdes_init_seq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	err = bu18tl82_parse_init_seq(dev, data, len, bu18tl82->serdes_init_seq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		dev_err(dev, "failed to parse serdes-init-sequence\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int bu18tl82_bridge_get_modes(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				     struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct bu18tl82 *bu18tl82 = bridge_to_bu18tl82(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return drm_bridge_get_modes(bu18tl82->bridge, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct mipi_dsi_device *bu18tl82_attach_dsi(struct bu18tl82 *bu18tl82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 						 struct device_node *dsi_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	const struct mipi_dsi_device_info info = { "bu18tl82", 0, NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct mipi_dsi_device *dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct mipi_dsi_host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	host = of_find_mipi_dsi_host_by_node(dsi_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (!host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		dev_err(bu18tl82->dev, "failed to find dsi host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return ERR_PTR(-EPROBE_DEFER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	dsi = mipi_dsi_device_register_full(host, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (IS_ERR(dsi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		dev_err(bu18tl82->dev, "failed to create dsi device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		return dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	dsi->lanes = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	dsi->format = MIPI_DSI_FMT_RGB888;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			  MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	ret = mipi_dsi_attach(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		dev_err(bu18tl82->dev, "failed to attach dsi to host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		mipi_dsi_device_unregister(dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return dsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int bu18tl82_bridge_attach(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				  enum drm_bridge_attach_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct bu18tl82 *bu18tl82 = bridge_to_bu18tl82(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	ret = drm_of_find_panel_or_bridge(bu18tl82->dev->of_node, 1, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 					  NULL, &bu18tl82->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	if (bu18tl82->sel_mipi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		/* Attach primary DSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		bu18tl82->dsi = bu18tl82_attach_dsi(bu18tl82, bu18tl82->dsi_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		if (IS_ERR(bu18tl82->dsi))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			return PTR_ERR(bu18tl82->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	ret = drm_bridge_attach(bridge->encoder, bu18tl82->bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 				bridge, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		if (bu18tl82->sel_mipi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			mipi_dsi_device_unregister(bu18tl82->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		dev_err(bu18tl82->dev, "failed to attach bridge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static void bu18tl82_bridge_detach(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct bu18tl82 *bu18tl82 = bridge_to_bu18tl82(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	if (bu18tl82->sel_mipi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		mipi_dsi_detach(bu18tl82->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		mipi_dsi_device_unregister(bu18tl82->dsi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static void bu18tl82_bridge_enable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	struct bu18tl82 *bu18tl82 = bridge_to_bu18tl82(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct serdes_init_seq *init_seq = bu18tl82->serdes_init_seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	int count = init_seq->reg_seq_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	regmap_multi_reg_write(bu18tl82->regmap, init_seq->reg_sequence, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	mdelay(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void bu18tl82_bridge_disable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static void bu18tl82_bridge_pre_enable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	struct bu18tl82 *bu18tl82 = bridge_to_bu18tl82(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (bu18tl82->supply) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		ret = regulator_enable(bu18tl82->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	if (bu18tl82->enable_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		gpiod_direction_output(bu18tl82->enable_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (bu18tl82->reset_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		gpiod_direction_output(bu18tl82->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		msleep(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		gpiod_direction_output(bu18tl82->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static void bu18tl82_bridge_post_disable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct bu18tl82 *bu18tl82 = bridge_to_bu18tl82(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (bu18tl82->reset_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		gpiod_direction_output(bu18tl82->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (bu18tl82->enable_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		gpiod_direction_output(bu18tl82->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (bu18tl82->supply)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		regulator_disable(bu18tl82->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const struct drm_bridge_funcs bu18tl82_bridge_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	.attach = bu18tl82_bridge_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	.detach = bu18tl82_bridge_detach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.enable = bu18tl82_bridge_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	.disable = bu18tl82_bridge_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	.pre_enable = bu18tl82_bridge_pre_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	.post_disable = bu18tl82_bridge_post_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	.get_modes = bu18tl82_bridge_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int bu18tl82_i2c_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			      const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	struct bu18tl82 *bu18tl82;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	bu18tl82 = devm_kzalloc(dev, sizeof(*bu18tl82), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (!bu18tl82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	bu18tl82->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	i2c_set_clientdata(client, bu18tl82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	bu18tl82->supply = devm_regulator_get(dev, "power");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (IS_ERR(bu18tl82->supply))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		return dev_err_probe(dev, PTR_ERR(bu18tl82->supply),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 				     "failed to get power regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	bu18tl82->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if (IS_ERR(bu18tl82->reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return dev_err_probe(dev, PTR_ERR(bu18tl82->reset_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 				     "failed to acquire reset gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	bu18tl82->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_ASIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	if (IS_ERR(bu18tl82->enable_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		return dev_err_probe(dev, PTR_ERR(bu18tl82->enable_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 				     "failed to acquire enable gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	bu18tl82->regmap = devm_regmap_init_i2c(client, &bu18tl82_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (IS_ERR(bu18tl82->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		return dev_err_probe(dev, PTR_ERR(bu18tl82->regmap),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				     "failed to initialize regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	bu18tl82->sel_mipi = of_property_read_bool(dev->of_node, "sel-mipi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (bu18tl82->sel_mipi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		bu18tl82->dsi_node = of_graph_get_remote_node(dev->of_node, 0, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		if (!bu18tl82->dsi_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			return dev_err_probe(dev, -ENODEV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 					     "failed to get remote node for dsi\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	ret = bu18tl82_get_init_seq(bu18tl82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	bu18tl82->base.funcs = &bu18tl82_bridge_funcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	bu18tl82->base.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	bu18tl82->base.ops = DRM_BRIDGE_OP_MODES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	drm_bridge_add(&bu18tl82->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int bu18tl82_i2c_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	struct bu18tl82 *bu18tl82 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	drm_bridge_remove(&bu18tl82->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const struct i2c_device_id bu18tl82_i2c_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	{ "bu18tl82", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MODULE_DEVICE_TABLE(i2c, bu18tl82_i2c_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static const struct of_device_id bu18tl82_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	{ .compatible = "rohm,bu18tl82" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MODULE_DEVICE_TABLE(of, bu18tl82_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static struct i2c_driver bu18tl82_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		.name = "bu18tl82",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		.of_match_table = bu18tl82_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	.probe = bu18tl82_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	.remove = bu18tl82_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	.id_table = bu18tl82_i2c_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) module_i2c_driver(bu18tl82_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) MODULE_AUTHOR("Guochun Huang <hero.huang@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MODULE_DESCRIPTION("Rohm BU18TL82 Clockless Link-BD Serializer with MIPI and LVDS Interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) MODULE_LICENSE("GPL");