Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2017, Collabora Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (c) 2017, General Electric Company
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * display bridge of the GE B850v3. There are two physical bridges on the video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * physical bridges are automatically configured by the input video signal, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * the driver has no access to the video processing pipeline. The driver is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * only needed to read EDID from the STDP2690 and to handle HPD events from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * STDP4028. The driver communicates with both bridges over i2c. The video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * signal pipeline is as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  *   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <drm/drm_atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <drm/drm_atomic_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <drm/drm_bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <drm/drm_edid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <drm/drm_print.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <drm/drm_probe_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define EDID_EXT_BLOCK_CNT 0x7E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define STDP4028_IRQ_OUT_CONF_REG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define STDP4028_DPTX_IRQ_EN_REG 0x3C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define STDP4028_DPTX_IRQ_STS_REG 0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define STDP4028_DPTX_STS_REG 0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define STDP4028_DPTX_DP_IRQ_EN 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define STDP4028_DPTX_HOTPLUG_IRQ_EN 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define STDP4028_DPTX_LINK_CH_IRQ_EN 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define STDP4028_DPTX_IRQ_CONFIG \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		(STDP4028_DPTX_LINK_CH_IRQ_EN | STDP4028_DPTX_HOTPLUG_IRQ_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define STDP4028_DPTX_HOTPLUG_STS 0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define STDP4028_DPTX_LINK_STS 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define STDP4028_CON_STATE_CONNECTED \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		(STDP4028_DPTX_HOTPLUG_STS | STDP4028_DPTX_LINK_STS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define STDP4028_DPTX_HOTPLUG_CH_STS 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define STDP4028_DPTX_LINK_CH_STS 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define STDP4028_DPTX_IRQ_CLEAR \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		(STDP4028_DPTX_LINK_CH_STS | STDP4028_DPTX_HOTPLUG_CH_STS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static DEFINE_MUTEX(ge_b850v3_lvds_dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) struct ge_b850v3_lvds {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct drm_connector connector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct drm_bridge bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct i2c_client *stdp4028_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct i2c_client *stdp2690_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static struct ge_b850v3_lvds *ge_b850v3_lvds_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static u8 *stdp2690_get_edid(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	unsigned char start = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	unsigned int total_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u8 *block = kmalloc(EDID_LENGTH, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct i2c_msg msgs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			.addr	= client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 			.flags	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			.len	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			.buf	= &start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			.addr	= client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 			.flags	= I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			.len	= EDID_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			.buf	= block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if (!block)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (i2c_transfer(adapter, msgs, 2) != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		DRM_ERROR("Unable to read EDID.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (!drm_edid_block_valid(block, 0, false, NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		DRM_ERROR("Invalid EDID data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	total_size = (block[EDID_EXT_BLOCK_CNT] + 1) * EDID_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (total_size > EDID_LENGTH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		kfree(block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		block = kmalloc(total_size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (!block)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		/* Yes, read the entire buffer, and do not skip the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		 * EDID_LENGTH bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		start = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		msgs[1].len = total_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		msgs[1].buf = block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		if (i2c_transfer(adapter, msgs, 2) != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			DRM_ERROR("Unable to read EDID extension blocks.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		if (!drm_edid_block_valid(block, 1, false, NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			DRM_ERROR("Invalid EDID data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	return block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	kfree(block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct edid *ge_b850v3_lvds_get_edid(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 					    struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	client = ge_b850v3_lvds_ptr->stdp2690_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return (struct edid *)stdp2690_get_edid(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int ge_b850v3_lvds_get_modes(struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct edid *edid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	int num_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	edid = ge_b850v3_lvds_get_edid(&ge_b850v3_lvds_ptr->bridge, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	drm_connector_update_edid_property(connector, edid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	num_modes = drm_add_edid_modes(connector, edid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	kfree(edid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	return num_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static enum drm_mode_status ge_b850v3_lvds_mode_valid(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		struct drm_connector *connector, struct drm_display_mode *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	return MODE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) drm_connector_helper_funcs ge_b850v3_lvds_connector_helper_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.get_modes = ge_b850v3_lvds_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.mode_valid = ge_b850v3_lvds_mode_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static enum drm_connector_status ge_b850v3_lvds_bridge_detect(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	struct i2c_client *stdp4028_i2c =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			ge_b850v3_lvds_ptr->stdp4028_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	s32 link_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	link_state = i2c_smbus_read_word_data(stdp4028_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 					      STDP4028_DPTX_STS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (link_state == STDP4028_CON_STATE_CONNECTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		return connector_status_connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (link_state == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return connector_status_disconnected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return connector_status_unknown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static enum drm_connector_status ge_b850v3_lvds_detect(struct drm_connector *connector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 						       bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return ge_b850v3_lvds_bridge_detect(&ge_b850v3_lvds_ptr->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static const struct drm_connector_funcs ge_b850v3_lvds_connector_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.fill_modes = drm_helper_probe_single_connector_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.detect = ge_b850v3_lvds_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.destroy = drm_connector_cleanup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	.reset = drm_atomic_helper_connector_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static int ge_b850v3_lvds_create_connector(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	struct drm_connector *connector = &ge_b850v3_lvds_ptr->connector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (!bridge->encoder) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		DRM_ERROR("Parent encoder object not found");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	connector->polled = DRM_CONNECTOR_POLL_HPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	drm_connector_helper_add(connector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 				 &ge_b850v3_lvds_connector_helper_funcs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ret = drm_connector_init(bridge->dev, connector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 				 &ge_b850v3_lvds_connector_funcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 				 DRM_MODE_CONNECTOR_DisplayPort);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		DRM_ERROR("Failed to initialize connector with drm\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	return drm_connector_attach_encoder(connector, bridge->encoder);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static irqreturn_t ge_b850v3_lvds_irq_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	struct i2c_client *stdp4028_i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			= ge_b850v3_lvds_ptr->stdp4028_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	i2c_smbus_write_word_data(stdp4028_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 				  STDP4028_DPTX_IRQ_STS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 				  STDP4028_DPTX_IRQ_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	if (ge_b850v3_lvds_ptr->bridge.dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		drm_kms_helper_hotplug_event(ge_b850v3_lvds_ptr->bridge.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static int ge_b850v3_lvds_attach(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				 enum drm_bridge_attach_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	struct i2c_client *stdp4028_i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			= ge_b850v3_lvds_ptr->stdp4028_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	/* Configures the bridge to re-enable interrupts after each ack. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	i2c_smbus_write_word_data(stdp4028_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 				  STDP4028_IRQ_OUT_CONF_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 				  STDP4028_DPTX_DP_IRQ_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	/* Enable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	i2c_smbus_write_word_data(stdp4028_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 				  STDP4028_DPTX_IRQ_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 				  STDP4028_DPTX_IRQ_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	return ge_b850v3_lvds_create_connector(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static const struct drm_bridge_funcs ge_b850v3_lvds_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	.attach = ge_b850v3_lvds_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	.detect = ge_b850v3_lvds_bridge_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	.get_edid = ge_b850v3_lvds_get_edid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int ge_b850v3_lvds_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	mutex_lock(&ge_b850v3_lvds_dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (ge_b850v3_lvds_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		goto success;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	ge_b850v3_lvds_ptr = devm_kzalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 					  sizeof(*ge_b850v3_lvds_ptr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 					  GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	if (!ge_b850v3_lvds_ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		mutex_unlock(&ge_b850v3_lvds_dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) success:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	mutex_unlock(&ge_b850v3_lvds_dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static void ge_b850v3_lvds_remove(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	mutex_lock(&ge_b850v3_lvds_dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	 * This check is to avoid both the drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	 * removing the bridge in their remove() function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (!ge_b850v3_lvds_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	drm_bridge_remove(&ge_b850v3_lvds_ptr->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	ge_b850v3_lvds_ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	mutex_unlock(&ge_b850v3_lvds_dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int ge_b850v3_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	struct i2c_client *stdp4028_i2c = ge_b850v3_lvds_ptr->stdp4028_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	struct device *dev = &stdp4028_i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	/* drm bridge initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	ge_b850v3_lvds_ptr->bridge.funcs = &ge_b850v3_lvds_funcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	ge_b850v3_lvds_ptr->bridge.ops = DRM_BRIDGE_OP_DETECT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 					 DRM_BRIDGE_OP_EDID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	ge_b850v3_lvds_ptr->bridge.type = DRM_MODE_CONNECTOR_DisplayPort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	ge_b850v3_lvds_ptr->bridge.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	drm_bridge_add(&ge_b850v3_lvds_ptr->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	/* Clear pending interrupts since power up. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	i2c_smbus_write_word_data(stdp4028_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 				  STDP4028_DPTX_IRQ_STS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 				  STDP4028_DPTX_IRQ_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (!stdp4028_i2c->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	return devm_request_threaded_irq(&stdp4028_i2c->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 			stdp4028_i2c->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 			ge_b850v3_lvds_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 			IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 			"ge-b850v3-lvds-dp", ge_b850v3_lvds_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int stdp4028_ge_b850v3_fw_probe(struct i2c_client *stdp4028_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 				       const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	struct device *dev = &stdp4028_i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	ret = ge_b850v3_lvds_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	ge_b850v3_lvds_ptr->stdp4028_i2c = stdp4028_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	i2c_set_clientdata(stdp4028_i2c, ge_b850v3_lvds_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	/* Only register after both bridges are probed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	if (!ge_b850v3_lvds_ptr->stdp2690_i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	return ge_b850v3_register();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int stdp4028_ge_b850v3_fw_remove(struct i2c_client *stdp4028_i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	ge_b850v3_lvds_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static const struct i2c_device_id stdp4028_ge_b850v3_fw_i2c_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	{"stdp4028_ge_fw", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MODULE_DEVICE_TABLE(i2c, stdp4028_ge_b850v3_fw_i2c_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const struct of_device_id stdp4028_ge_b850v3_fw_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	{ .compatible = "megachips,stdp4028-ge-b850v3-fw" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MODULE_DEVICE_TABLE(of, stdp4028_ge_b850v3_fw_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static struct i2c_driver stdp4028_ge_b850v3_fw_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	.id_table	= stdp4028_ge_b850v3_fw_i2c_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	.probe		= stdp4028_ge_b850v3_fw_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	.remove		= stdp4028_ge_b850v3_fw_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		.name		= "stdp4028-ge-b850v3-fw",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		.of_match_table = stdp4028_ge_b850v3_fw_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static int stdp2690_ge_b850v3_fw_probe(struct i2c_client *stdp2690_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 				       const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	struct device *dev = &stdp2690_i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	ret = ge_b850v3_lvds_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	ge_b850v3_lvds_ptr->stdp2690_i2c = stdp2690_i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	i2c_set_clientdata(stdp2690_i2c, ge_b850v3_lvds_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	/* Only register after both bridges are probed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	if (!ge_b850v3_lvds_ptr->stdp4028_i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	return ge_b850v3_register();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int stdp2690_ge_b850v3_fw_remove(struct i2c_client *stdp2690_i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	ge_b850v3_lvds_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const struct i2c_device_id stdp2690_ge_b850v3_fw_i2c_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	{"stdp2690_ge_fw", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) MODULE_DEVICE_TABLE(i2c, stdp2690_ge_b850v3_fw_i2c_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static const struct of_device_id stdp2690_ge_b850v3_fw_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	{ .compatible = "megachips,stdp2690-ge-b850v3-fw" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) MODULE_DEVICE_TABLE(of, stdp2690_ge_b850v3_fw_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static struct i2c_driver stdp2690_ge_b850v3_fw_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	.id_table	= stdp2690_ge_b850v3_fw_i2c_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	.probe		= stdp2690_ge_b850v3_fw_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	.remove		= stdp2690_ge_b850v3_fw_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		.name		= "stdp2690-ge-b850v3-fw",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 		.of_match_table = stdp2690_ge_b850v3_fw_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static int __init stdpxxxx_ge_b850v3_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	ret = i2c_add_driver(&stdp4028_ge_b850v3_fw_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	return i2c_add_driver(&stdp2690_ge_b850v3_fw_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) module_init(stdpxxxx_ge_b850v3_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static void __exit stdpxxxx_ge_b850v3_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	i2c_del_driver(&stdp2690_ge_b850v3_fw_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	i2c_del_driver(&stdp4028_ge_b850v3_fw_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) module_exit(stdpxxxx_ge_b850v3_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) MODULE_AUTHOR("Peter Senna Tschudin <peter.senna@collabora.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) MODULE_AUTHOR("Martyn Welch <martyn.welch@collabora.co.uk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) MODULE_DESCRIPTION("GE LVDS to DP++ display bridge)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) MODULE_LICENSE("GPL v2");