Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Maxim MAX96745 GMSL2 Serializer with eDP1.4a/DP1.4 Input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <drm/drm_atomic_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <drm/drm_bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <drm/drm_panel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <drm/drm_print.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <drm/drm_of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <drm/drm_connector.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <drm/drm_probe_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/extcon-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/mfd/max96745.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) struct max96745_bridge {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct drm_bridge bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct drm_bridge *next_bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct drm_panel *panel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	enum drm_connector_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		struct gpio_desc *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		atomic_t triggered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	} lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct extcon_dev *extcon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define to_max96745_bridge(x)	container_of(x, struct max96745_bridge, x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static const unsigned int max96745_bridge_cable[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	EXTCON_JACK_VIDEO_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	EXTCON_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static bool max96745_bridge_link_locked(struct max96745_bridge *ser)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	if (regmap_read(ser->regmap, 0x002a, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	if (!FIELD_GET(LINK_LOCKED, val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static bool max96745_bridge_vid_tx_active(struct max96745_bridge *ser)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	if (regmap_read(ser->regmap, 0x0107, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (!FIELD_GET(VID_TX_ACTIVE_A | VID_TX_ACTIVE_B, val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static int max96745_bridge_attach(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 				  enum drm_bridge_attach_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	ret = drm_of_find_panel_or_bridge(bridge->of_node, 1, -1, &ser->panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 					  &ser->next_bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (ret < 0 && ret != -ENODEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (ser->next_bridge) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		ret = drm_bridge_attach(bridge->encoder, ser->next_bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 					bridge, DRM_BRIDGE_ATTACH_NO_CONNECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (max96745_bridge_link_locked(ser))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		ser->status = connector_status_connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		ser->status = connector_status_disconnected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	extcon_set_state(ser->extcon, EXTCON_JACK_VIDEO_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			 max96745_bridge_vid_tx_active(ser));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static void max96745_bridge_pre_enable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (ser->panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		drm_panel_prepare(ser->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static void max96745_bridge_enable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (ser->panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		drm_panel_enable(ser->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	extcon_set_state_sync(ser->extcon, EXTCON_JACK_VIDEO_OUT, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void max96745_bridge_disable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	extcon_set_state_sync(ser->extcon, EXTCON_JACK_VIDEO_OUT, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (ser->panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		drm_panel_disable(ser->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static void max96745_bridge_post_disable(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (ser->panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		drm_panel_unprepare(ser->panel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static enum drm_connector_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) max96745_bridge_detect(struct drm_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	enum drm_connector_status status = connector_status_connected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (!drm_kms_helper_is_poll_worker())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return ser->status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (!max96745_bridge_link_locked(ser)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		status = connector_status_disconnected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (extcon_get_state(ser->extcon, EXTCON_JACK_VIDEO_OUT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		u32 dprx_trn_status2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		if (atomic_cmpxchg(&ser->lock.triggered, 1, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			status = connector_status_disconnected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		if (regmap_read(ser->regmap, 0x641a, &dprx_trn_status2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			status = connector_status_disconnected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		if ((dprx_trn_status2 & DPRX_TRAIN_STATE) != DPRX_TRAIN_STATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			dev_err(ser->dev, "Training State: 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				FIELD_GET(DPRX_TRAIN_STATE, dprx_trn_status2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			status = connector_status_disconnected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		atomic_set(&ser->lock.triggered, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (ser->next_bridge && (ser->next_bridge->ops & DRM_BRIDGE_OP_DETECT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		status = drm_bridge_detect(ser->next_bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	ser->status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int max96745_bridge_get_modes(struct drm_bridge *bridge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 				     struct drm_connector *connector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct max96745_bridge *ser = to_max96745_bridge(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (ser->next_bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return drm_bridge_get_modes(ser->next_bridge, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (ser->panel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		return drm_panel_get_modes(ser->panel, connector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	return drm_add_modes_noedid(connector, 1920, 1080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct drm_bridge_funcs max96745_bridge_funcs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.attach = max96745_bridge_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.detect = max96745_bridge_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.get_modes = max96745_bridge_get_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.pre_enable = max96745_bridge_pre_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	.enable = max96745_bridge_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	.disable = max96745_bridge_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.post_disable = max96745_bridge_post_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.atomic_get_input_bus_fmts = drm_atomic_helper_bridge_propagate_bus_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.atomic_reset = drm_atomic_helper_bridge_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static irqreturn_t max96745_bridge_lock_irq_handler(int irq, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct max96745_bridge *ser = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (extcon_get_state(ser->extcon, EXTCON_JACK_VIDEO_OUT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		atomic_set(&ser->lock.triggered, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int max96745_bridge_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	struct max96745_bridge *ser;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	ser = devm_kzalloc(dev, sizeof(*ser), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	if (!ser)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	ser->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	platform_set_drvdata(pdev, ser);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	ser->regmap = dev_get_regmap(dev->parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	if (!ser->regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		return dev_err_probe(dev, -ENODEV, "failed to get regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	ser->lock.gpio = devm_gpiod_get(dev, "lock", GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	if (IS_ERR(ser->lock.gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		return dev_err_probe(dev, PTR_ERR(ser->lock.gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				     "failed to get lock GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	ser->extcon = devm_extcon_dev_allocate(dev, max96745_bridge_cable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (IS_ERR(ser->extcon))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return dev_err_probe(dev, PTR_ERR(ser->extcon),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 				     "failed to allocate extcon device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ret = devm_extcon_dev_register(dev, ser->extcon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return dev_err_probe(dev, ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 				     "failed to register extcon device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	ser->lock.irq = gpiod_to_irq(ser->lock.gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	if (ser->lock.irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		return ser->lock.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	ret = devm_request_threaded_irq(dev, ser->lock.irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 					max96745_bridge_lock_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 					dev_name(dev), ser);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		return dev_err_probe(dev, ret, "failed to request lock IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	ser->bridge.funcs = &max96745_bridge_funcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	ser->bridge.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	ser->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_MODES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	ser->bridge.type = DRM_MODE_CONNECTOR_LVDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	drm_bridge_add(&ser->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static int max96745_bridge_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	struct max96745_bridge *ser = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	drm_bridge_remove(&ser->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const struct of_device_id max96745_bridge_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	{ .compatible = "maxim,max96745-bridge", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) MODULE_DEVICE_TABLE(of, max96745_bridge_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static struct platform_driver max96745_bridge_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		.name = "max96745-bridge",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		.of_match_table = of_match_ptr(max96745_bridge_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	.probe = max96745_bridge_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	.remove = max96745_bridge_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) module_platform_driver(max96745_bridge_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MODULE_DESCRIPTION("Maxim MAX96745 GMSL2 Serializer with eDP1.4a/DP1.4 Input");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MODULE_LICENSE("GPL");