^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <drm/drm_crtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <drm/drm_crtc_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <drm/drm_encoder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <drm/drm_fb_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <drm/drm_gem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <drm/drm_gem_vram_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <drm/drm_simple_kms_helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define VBE_DISPI_IOPORT_INDEX 0x01CE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define VBE_DISPI_IOPORT_DATA 0x01CF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define VBE_DISPI_INDEX_ID 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define VBE_DISPI_INDEX_XRES 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define VBE_DISPI_INDEX_YRES 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define VBE_DISPI_INDEX_BPP 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define VBE_DISPI_INDEX_ENABLE 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define VBE_DISPI_INDEX_BANK 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define VBE_DISPI_INDEX_X_OFFSET 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define VBE_DISPI_INDEX_Y_OFFSET 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define VBE_DISPI_ID0 0xB0C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define VBE_DISPI_ID1 0xB0C1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define VBE_DISPI_ID2 0xB0C2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define VBE_DISPI_ID3 0xB0C3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define VBE_DISPI_ID4 0xB0C4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define VBE_DISPI_ID5 0xB0C5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define VBE_DISPI_DISABLED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define VBE_DISPI_ENABLED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define VBE_DISPI_GETCAPS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define VBE_DISPI_8BIT_DAC 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define VBE_DISPI_LFB_ENABLED 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define VBE_DISPI_NOCLEARMEM 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) enum bochs_types {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) BOCHS_QEMU_STDVGA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) BOCHS_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct bochs_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* hw */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void __iomem *mmio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int ioports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void __iomem *fb_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) unsigned long fb_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned long fb_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned long qext_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u16 xres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u16 yres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u16 yres_virtual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u32 stride;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u32 bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct edid *edid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* drm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct drm_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct drm_simple_display_pipe pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct drm_connector connector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* bochs_hw.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int bochs_hw_init(struct drm_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) void bochs_hw_fini(struct drm_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) void bochs_hw_setmode(struct bochs_device *bochs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct drm_display_mode *mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) void bochs_hw_setformat(struct bochs_device *bochs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) const struct drm_format_info *format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) void bochs_hw_setbase(struct bochs_device *bochs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int x, int y, int stride, u64 addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int bochs_hw_load_edid(struct bochs_device *bochs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* bochs_mm.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int bochs_mm_init(struct bochs_device *bochs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) void bochs_mm_fini(struct bochs_device *bochs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* bochs_kms.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int bochs_kms_init(struct bochs_device *bochs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* bochs_fbdev.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) extern const struct drm_mode_config_funcs bochs_mode_funcs;
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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