^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/idr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pinctrl/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <uapi/linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "gpiolib.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "gpiolib-of.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "gpiolib-acpi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "gpiolib-cdev.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "gpiolib-sysfs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CREATE_TRACE_POINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <trace/events/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #undef CREATE_TRACE_POINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <trace/hooks/gpiolib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Implementation infrastructure for GPIO interfaces.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * The GPIO programming interface allows for inlining speed-critical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * get/set operations for common cases, so that access to SOC-integrated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * GPIOs can sometimes cost only an instruction or two per bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* When debugging, extend minimal trust to callers and platform code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Also emit diagnostic messages that may help initial bringup, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * board setup or driver bugs are most common.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Otherwise, minimize overhead in what may be bitbanging codepaths.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define extra_checks 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define extra_checks 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Device and char device-related information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static DEFINE_IDA(gpio_ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static dev_t gpio_devt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int gpio_bus_match(struct device *dev, struct device_driver *drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static struct bus_type gpio_bus_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .name = "gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .match = gpio_bus_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * Number of GPIOs to use for the fast path in set array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* gpio_lock prevents conflicts during gpio_desc[] table updates.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * While any GPIO is requested, its gpio_chip is not removable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * each GPIO's "requested" flag serves as a lock and refcount.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) DEFINE_SPINLOCK(gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static DEFINE_MUTEX(gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static LIST_HEAD(gpio_lookup_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) LIST_HEAD(gpio_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static DEFINE_MUTEX(gpio_machine_hogs_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static LIST_HEAD(gpio_machine_hogs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static void gpiochip_free_hogs(struct gpio_chip *gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int gpiochip_add_irqchip(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct lock_class_key *request_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static void gpiochip_irqchip_remove(struct gpio_chip *gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static bool gpiolib_initialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static inline void desc_set_label(struct gpio_desc *d, const char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) d->label = label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * gpio_to_desc - Convert a GPIO number to its descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @gpio: global GPIO number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * with the given number exists in the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct gpio_desc *gpio_to_desc(unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) list_for_each_entry(gdev, &gpio_devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (gdev->base <= gpio &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) gdev->base + gdev->ngpio > gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return &gdev->descs[gpio - gdev->base];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (!gpio_is_valid(gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) WARN(1, "invalid GPIO %d\n", gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) EXPORT_SYMBOL_GPL(gpio_to_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * hardware number for this chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @gc: GPIO chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @hwnum: hardware number of the GPIO for this chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * in the given chip for the specified hardware number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned int hwnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct gpio_device *gdev = gc->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (hwnum >= gdev->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return &gdev->descs[hwnum];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) EXPORT_SYMBOL_GPL(gpiochip_get_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * desc_to_gpio - convert a GPIO descriptor to the integer namespace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * @desc: GPIO descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * This should disappear in the future but is needed since we still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * use GPIO numbers for error messages and sysfs nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * The global GPIO number for the GPIO specified by its descriptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int desc_to_gpio(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return desc->gdev->base + (desc - &desc->gdev->descs[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) EXPORT_SYMBOL_GPL(desc_to_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * @desc: descriptor to return the chip of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (!desc || !desc->gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) EXPORT_SYMBOL_GPL(gpiod_to_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* dynamic allocation of GPIOs, e.g. on a hotplugged device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int gpiochip_find_base(int ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int base = ARCH_NR_GPIOS - ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) list_for_each_entry_reverse(gdev, &gpio_devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* found a free space? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (gdev->base + gdev->ngpio <= base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* nope, check the space right before the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) base = gdev->base - ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (gpio_is_valid(base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) pr_debug("%s: found new base at %d\n", __func__, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) pr_err("%s: cannot find free range\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * gpiod_get_direction - return the current direction of a GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * @desc: GPIO to get the direction of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * Returns 0 for output, 1 for input, or an error code in case of error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * This function may sleep if gpiod_cansleep() is true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int gpiod_get_direction(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) unsigned offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) gc = gpiod_to_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) offset = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * Open drain emulation using input mode may incorrectly report
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * input here, fix that up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) test_bit(FLAG_IS_OUT, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (!gc->get_direction)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ret = gc->get_direction(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) EXPORT_SYMBOL_GPL(gpiod_get_direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * Add a new chip to the global chips list, keeping the list of chips sorted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * by range(means [base, base + ngpio - 1]) order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * Return -EBUSY if the new chip overlaps with some other chip's integer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static int gpiodev_add_to_list(struct gpio_device *gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct gpio_device *prev, *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (list_empty(&gpio_devices)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* initial entry in list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) list_add_tail(&gdev->list, &gpio_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) next = list_entry(gpio_devices.next, struct gpio_device, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (gdev->base + gdev->ngpio <= next->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* add before first entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) list_add(&gdev->list, &gpio_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) prev = list_entry(gpio_devices.prev, struct gpio_device, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (prev->base + prev->ngpio <= gdev->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /* add behind last entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) list_add_tail(&gdev->list, &gpio_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) list_for_each_entry_safe(prev, next, &gpio_devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* at the end of the list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (&next->list == &gpio_devices)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* add between prev and next */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (prev->base + prev->ngpio <= gdev->base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) && gdev->base + gdev->ngpio <= next->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) list_add(&gdev->list, &prev->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * Convert a GPIO name to its descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * Note that there is no guarantee that GPIO names are globally unique!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * Hence this function will return, if it exists, a reference to the first GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * line found that matches the given name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static struct gpio_desc *gpio_name_to_desc(const char * const name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (!name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) list_for_each_entry(gdev, &gpio_devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) for (i = 0; i != gdev->ngpio; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct gpio_desc *desc = &gdev->descs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (!desc->name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (!strcmp(desc->name, name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * Take the names from gc->names and assign them to their GPIO descriptors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * Warn if a name is already used for a GPIO line on a different GPIO chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) * Note that:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * 1. Non-unique names are still accepted,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * 2. Name collisions within the same GPIO chip are not reported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static int gpiochip_set_desc_names(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct gpio_device *gdev = gc->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* First check all names if they are unique */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) for (i = 0; i != gc->ngpio; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct gpio_desc *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) gpio = gpio_name_to_desc(gc->names[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dev_warn(&gdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) "Detected name collision for GPIO name '%s'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) gc->names[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* Then add all names to the GPIO descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) for (i = 0; i != gc->ngpio; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) gdev->descs[i].name = gc->names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * devprop_gpiochip_set_names - Set GPIO line names using device properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * @chip: GPIO chip whose lines should be named, if possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * Looks for device property "gpio-line-names" and if it exists assigns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * GPIO line names for the chip. The memory allocated for the assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * names belong to the underlying firmware node and should not be released
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * by the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static int devprop_gpiochip_set_names(struct gpio_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct gpio_device *gdev = chip->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) const char **names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (count > gdev->ngpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) count, gdev->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) count = gdev->ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) names = kcalloc(count, sizeof(*names), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (!names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) names, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) dev_warn(&gdev->dev, "failed to read GPIO line names\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) kfree(names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) for (i = 0; i < count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) gdev->descs[i].name = names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) kfree(names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) unsigned long *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (!p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* Assume by default all GPIOs are valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) bitmap_fill(p, gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) gc->valid_mask = gpiochip_allocate_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!gc->valid_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static int gpiochip_init_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (gc->init_valid_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return gc->init_valid_mask(gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) gc->valid_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static void gpiochip_free_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) bitmap_free(gc->valid_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) gc->valid_mask = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (gc->add_pin_ranges)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return gc->add_pin_ranges(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) bool gpiochip_line_is_valid(const struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) /* No mask means all valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (likely(!gc->valid_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return test_bit(offset, gc->valid_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static void gpiodevice_release(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) list_del(&gdev->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) ida_free(&gpio_ida, gdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) kfree_const(gdev->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) kfree(gdev->descs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) kfree(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #ifdef CONFIG_GPIO_CDEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) * gpiolib_cdev_register() indirectly calls device_add(), which is still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) * required even when cdev is not selected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #define gcdev_unregister(gdev) device_del(&(gdev)->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static int gpiochip_setup_dev(struct gpio_device *gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ret = gcdev_register(gdev, gpio_devt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ret = gpiochip_sysfs_register(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) goto err_remove_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /* From this point, the .release() function cleans up gpio_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) gdev->dev.release = gpiodevice_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) err_remove_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) gcdev_unregister(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) int rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) desc = gpiochip_get_desc(gc, hog->chip_hwnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (IS_ERR(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PTR_ERR(desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if (test_bit(FLAG_IS_HOGGED, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (rv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) __func__, gc->label, hog->chip_hwnum, rv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static void machine_gpiochip_add(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) struct gpiod_hog *hog;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) mutex_lock(&gpio_machine_hogs_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) list_for_each_entry(hog, &gpio_machine_hogs, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (!strcmp(gc->label, hog->chip_label))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) gpiochip_machine_hog(gc, hog);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) mutex_unlock(&gpio_machine_hogs_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static void gpiochip_setup_devs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) list_for_each_entry(gdev, &gpio_devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ret = gpiochip_setup_dev(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) dev_err(&gdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) "Failed to initialize gpio device (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) struct lock_class_key *request_key)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct fwnode_handle *fwnode = gc->parent ? dev_fwnode(gc->parent) : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) int base = gc->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) bool block_gpio_read = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * First: allocate and populate the internal stat container, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * set up the struct device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (!gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) gdev->dev.bus = &gpio_bus_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) gdev->chip = gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) gc->gpiodev = gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (gc->parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) gdev->dev.parent = gc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) gdev->dev.of_node = gc->parent->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) of_gpio_dev_init(gc, gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * Assign fwnode depending on the result of the previous calls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * if none of them succeed, assign it to the parent's one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (gdev->id < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) ret = gdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) goto err_free_gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) goto err_free_ida;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) device_initialize(&gdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (gc->parent && gc->parent->driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) gdev->owner = gc->parent->driver->owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) else if (gc->owner)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* TODO: remove chip->owner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) gdev->owner = gc->owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) gdev->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (!gdev->descs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) goto err_free_dev_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (gc->ngpio == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) goto err_free_descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) if (gc->ngpio > FASTPATH_NGPIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) gc->ngpio, FASTPATH_NGPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (!gdev->label) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) goto err_free_descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) gdev->ngpio = gc->ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) gdev->data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * TODO: this allocates a Linux GPIO number base in the global
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * GPIO numberspace for this chip. In the long run we want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * get *rid* of this numberspace and use only descriptors, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * it may be a pipe dream. It will not happen before we get rid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * of the sysfs interface anyways.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (base < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) base = gpiochip_find_base(gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (base < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) ret = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) goto err_free_label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) * TODO: it should not be necessary to reflect the assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * base outside of the GPIO subsystem. Go over drivers and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * see if anyone makes use of this, else drop this and assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * a poison instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) gc->base = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) gdev->base = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) ret = gpiodev_add_to_list(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) goto err_free_label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) for (i = 0; i < gc->ngpio; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) gdev->descs[i].gdev = gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) #ifdef CONFIG_PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) INIT_LIST_HEAD(&gdev->pin_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (gc->names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ret = gpiochip_set_desc_names(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) ret = devprop_gpiochip_set_names(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) goto err_remove_from_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) ret = gpiochip_alloc_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) goto err_remove_from_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) ret = of_gpiochip_add(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) goto err_free_gpiochip_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) ret = gpiochip_init_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) goto err_remove_of_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) trace_android_vh_gpio_block_read(gdev, &block_gpio_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (!block_gpio_read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) for (i = 0; i < gc->ngpio; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) struct gpio_desc *desc = &gdev->descs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) assign_bit(FLAG_IS_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) &desc->flags, !gc->get_direction(gc, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) assign_bit(FLAG_IS_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) &desc->flags, !gc->direction_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) ret = gpiochip_add_pin_ranges(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) goto err_remove_of_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) acpi_gpiochip_add(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) machine_gpiochip_add(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) ret = gpiochip_irqchip_init_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) goto err_remove_acpi_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) ret = gpiochip_irqchip_init_hw(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) goto err_remove_acpi_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) ret = gpiochip_add_irqchip(gc, lock_key, request_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) goto err_remove_irqchip_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * By first adding the chardev, and then adding the device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * we get a device node entry in sysfs under
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * coldplug of device nodes and other udev business.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * We can do this only if gpiolib has been initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * Otherwise, defer until later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (gpiolib_initialized) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ret = gpiochip_setup_dev(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) goto err_remove_irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) err_remove_irqchip:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) gpiochip_irqchip_remove(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) err_remove_irqchip_mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) gpiochip_irqchip_free_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) err_remove_acpi_chip:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) acpi_gpiochip_remove(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) err_remove_of_chip:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) gpiochip_free_hogs(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) of_gpiochip_remove(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) err_free_gpiochip_mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) gpiochip_remove_pin_ranges(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) gpiochip_free_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) err_remove_from_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) list_del(&gdev->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) err_free_label:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) kfree_const(gdev->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) err_free_descs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) kfree(gdev->descs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) err_free_dev_name:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) kfree(dev_name(&gdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) err_free_ida:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) ida_free(&gpio_ida, gdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) err_free_gdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) /* failures here can mean systems won't boot... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) gdev->base, gdev->base + gdev->ngpio - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) gc->label ? : "generic", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) kfree(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) * gpiochip_get_data() - get per-subdriver data for the chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * @gc: GPIO chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) * The per-subdriver data for the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) void *gpiochip_get_data(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) return gc->gpiodev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) EXPORT_SYMBOL_GPL(gpiochip_get_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) * gpiochip_remove() - unregister a gpio_chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) * @gc: the chip to unregister
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) * A gpio_chip with any GPIOs still requested may not be removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) void gpiochip_remove(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) struct gpio_device *gdev = gc->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) gpiochip_sysfs_unregister(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) gpiochip_free_hogs(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* Numb the device, cancelling all outstanding operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) gdev->chip = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) gpiochip_irqchip_remove(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) acpi_gpiochip_remove(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) of_gpiochip_remove(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) gpiochip_remove_pin_ranges(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) gpiochip_free_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) * We accept no more calls into the driver from this point, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) * NULL the driver data pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) gdev->data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) for (i = 0; i < gdev->ngpio; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (gpiochip_is_requested(gc, i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) if (i != gdev->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) dev_crit(&gdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) * The gpiochip side puts its use of the device to rest here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) * if there are no userspace clients, the chardev and device will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) * be removed, else it will be dangling until the last user is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) * gone.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) gcdev_unregister(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) put_device(&gdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) EXPORT_SYMBOL_GPL(gpiochip_remove);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) * gpiochip_find() - iterator for locating a specific gpio_chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * @data: data to pass to match function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * @match: Callback function to check gpio_chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) * Similar to bus_find_device. It returns a reference to a gpio_chip as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) * determined by a user supplied @match callback. The callback should return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * 0 if the device doesn't match and non-zero if it does. If the callback is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) * non-zero, this function will return to the caller and not iterate over any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * more gpio_chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) struct gpio_chip *gpiochip_find(void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) int (*match)(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) void *data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) struct gpio_chip *gc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) list_for_each_entry(gdev, &gpio_devices, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (gdev->chip && match(gdev->chip, data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) gc = gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) return gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) EXPORT_SYMBOL_GPL(gpiochip_find);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) static int gpiochip_match_name(struct gpio_chip *gc, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) const char *name = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) return !strcmp(gc->label, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static struct gpio_chip *find_chip_by_name(const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return gpiochip_find((void *)name, gpiochip_match_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) #ifdef CONFIG_GPIOLIB_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) * The following is irqchip helper code for gpiochips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) struct gpio_irq_chip *girq = &gc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) if (!girq->init_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return girq->init_hw(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct gpio_irq_chip *girq = &gc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) if (!girq->init_valid_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) girq->valid_mask = gpiochip_allocate_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (!girq->valid_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) bitmap_free(gc->irq.valid_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) gc->irq.valid_mask = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) if (!gpiochip_line_is_valid(gc, offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) /* No mask means all valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if (likely(!gc->irq.valid_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) return test_bit(offset, gc->irq.valid_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) * @gc: the gpiochip to set the irqchip chain to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) * @parent_irq: the irq number corresponding to the parent IRQ for this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) * cascaded irqchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) * @parent_handler: the parent interrupt handler for the accumulated IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) * coming out of the gpiochip. If the interrupt is nested rather than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) * cascaded, pass NULL in this handler argument
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) unsigned int parent_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) irq_flow_handler_t parent_handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) struct gpio_irq_chip *girq = &gc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) struct device *dev = &gc->gpiodev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (!girq->domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) chip_err(gc, "called %s before setting up irqchip\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) if (parent_handler) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) if (gc->can_sleep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) chip_err(gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) "you cannot have chained interrupts on a chip that may sleep\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) girq->parents = devm_kcalloc(dev, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) sizeof(*girq->parents),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) if (!girq->parents) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) chip_err(gc, "out of memory allocating parent IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) girq->parents[0] = parent_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) girq->num_parents = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) * The parent irqchip is already using the chip_data for this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) * irqchip, so our callbacks simply use the handler_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) irq_set_chained_handler_and_data(parent_irq, parent_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) * @gc: the gpiochip to set the irqchip nested handler to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) * @irqchip: the irqchip to nest to the gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) * @parent_irq: the irq number corresponding to the parent IRQ for this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) * nested irqchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) void gpiochip_set_nested_irqchip(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) struct irq_chip *irqchip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) unsigned int parent_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) gpiochip_set_cascaded_irqchip(gc, parent_irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * to a gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * @gc: the gpiochip to set the irqchip hierarchical handler to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * will then percolate up to the parent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) struct irq_chip *irqchip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) /* DT will deal with mapping each IRQ as we go along */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) if (is_of_node(gc->irq.fwnode))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) * This is for legacy and boardfile "irqchip" fwnodes: allocate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) * irqs upfront instead of dynamically since we don't have the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) * dynamic type of allocation that hardware description languages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) * provide. Once all GPIO drivers using board files are gone from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * the kernel we can delete this code, but for a transitional period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) * it is necessary to keep this around.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) if (is_fwnode_irqchip(gc->irq.fwnode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) for (i = 0; i < gc->ngpio; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) struct irq_fwspec fwspec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) unsigned int parent_hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) unsigned int parent_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) struct gpio_irq_chip *girq = &gc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) * We call the child to parent translation function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) * only to check if the child IRQ is valid or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) * Just pick the rising edge type here as that is what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) * we likely need to support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) ret = girq->child_to_parent_hwirq(gc, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) IRQ_TYPE_EDGE_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) &parent_hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) &parent_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) chip_err(gc, "skip set-up on hwirq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) fwspec.fwnode = gc->irq.fwnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) /* This is the hwirq for the GPIO line side of things */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) fwspec.param[0] = girq->child_offset_to_irq(gc, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) /* Just pick something */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) fwspec.param_count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) ret = __irq_domain_alloc_irqs(gc->irq.domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) /* just pick something */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) NUMA_NO_NODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) &fwspec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) chip_err(gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) i, parent_hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) struct irq_fwspec *fwspec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) unsigned long *hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) unsigned int *type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) /* We support standard DT translation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) return irq_domain_translate_twocell(d, fwspec, hwirq, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) /* This is for board files and others not using DT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) if (is_fwnode_irqchip(fwspec->fwnode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) WARN_ON(*type == IRQ_TYPE_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) unsigned int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) unsigned int nr_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) struct gpio_chip *gc = d->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) irq_hw_number_t hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) unsigned int type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) struct irq_fwspec *fwspec = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) void *parent_arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) unsigned int parent_hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) unsigned int parent_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) struct gpio_irq_chip *girq = &gc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * The nr_irqs parameter is always one except for PCI multi-MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) * so this should not happen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) WARN_ON(nr_irqs != 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) ret = girq->child_to_parent_hwirq(gc, hwirq, type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) &parent_hwirq, &parent_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) chip_err(gc, "can't look up hwirq %lu\n", hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) * We set handle_bad_irq because the .set_type() should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) * always be invoked and set the right type of handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) irq_domain_set_info(d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) gc->irq.chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) girq->handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) irq_set_probe(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) /* This parent only handles asserted level IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) if (!parent_arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) irq, parent_hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) * If the parent irqdomain is msi, the interrupts have already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) * been allocated, so the EEXIST is good.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) chip_err(gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) "failed to allocate parent hwirq %d for hwirq %lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) parent_hwirq, hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) kfree(parent_arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) return offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) ops->activate = gpiochip_irq_domain_activate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) ops->deactivate = gpiochip_irq_domain_deactivate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) ops->free = irq_domain_free_irqs_common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) * We only allow overriding the translate() function for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) * hierarchical chips, and this should only be done if the user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) * really need something other than 1:1 translation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) if (!ops->translate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) ops->translate = gpiochip_hierarchy_irq_domain_translate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) if (!gc->irq.child_to_parent_hwirq ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) !gc->irq.fwnode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) chip_err(gc, "missing irqdomain vital data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) if (!gc->irq.child_offset_to_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (!gc->irq.populate_parent_alloc_arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) gc->irq.populate_parent_alloc_arg =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) gpiochip_populate_parent_fwspec_twocell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) gc->irq.domain = irq_domain_create_hierarchy(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) gc->irq.parent_domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) gc->ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) gc->irq.fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) &gc->irq.child_irq_domain_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) if (!gc->irq.domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) return !!gc->irq.parent_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) unsigned int parent_hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) unsigned int parent_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) struct irq_fwspec *fwspec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (!fwspec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) fwspec->fwnode = gc->irq.parent_domain->fwnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) fwspec->param_count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) fwspec->param[0] = parent_hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) fwspec->param[1] = parent_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) return fwspec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) unsigned int parent_hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) unsigned int parent_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) struct irq_fwspec *fwspec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) if (!fwspec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) fwspec->fwnode = gc->irq.parent_domain->fwnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) fwspec->param_count = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) fwspec->param[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) fwspec->param[1] = parent_hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) fwspec->param[2] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) fwspec->param[3] = parent_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) return fwspec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) * @d: the irqdomain used by this irqchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) * @irq: the global irq number used by this GPIO irqchip irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) * @hwirq: the local IRQ/GPIO line offset on this gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) * This function will set up the mapping for a certain IRQ line on a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) * gpiochip by assigning the gpiochip as chip data, and using the irqchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) * stored inside the gpiochip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) struct gpio_chip *gc = d->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (!gpiochip_irqchip_irq_valid(gc, hwirq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) irq_set_chip_data(irq, gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) * This lock class tells lockdep that GPIO irqs are in a different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) * category than their parents, so it won't report false recursion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) /* Chips that use nested thread handlers have them marked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) if (gc->irq.threaded)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) irq_set_nested_thread(irq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) irq_set_noprobe(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) if (gc->irq.num_parents == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) ret = irq_set_parent(irq, gc->irq.parents[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) else if (gc->irq.map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) ret = irq_set_parent(irq, gc->irq.map[hwirq]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) * No set-up of the hardware will happen if IRQ_TYPE_NONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) * is passed as default type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) if (gc->irq.default_type != IRQ_TYPE_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) irq_set_irq_type(irq, gc->irq.default_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) EXPORT_SYMBOL_GPL(gpiochip_irq_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) struct gpio_chip *gc = d->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) if (gc->irq.threaded)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) irq_set_nested_thread(irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) irq_set_chip_and_handler(irq, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) irq_set_chip_data(irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) static const struct irq_domain_ops gpiochip_domain_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) .map = gpiochip_irq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) .unmap = gpiochip_irq_unmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) /* Virtually all GPIO irqchips are twocell:ed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) .xlate = irq_domain_xlate_twocell,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) * TODO: move these activate/deactivate in under the hierarchicial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) * irqchip implementation as static once SPMI and SSBI (all external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) * users) are phased over.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) * @domain: The IRQ domain used by this IRQ chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) * @data: Outermost irq_data associated with the IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) * @reserve: If set, only reserve an interrupt vector instead of assigning one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) * used as the activate function for the &struct irq_domain_ops. The host_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) * for the IRQ domain must be the &struct gpio_chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) int gpiochip_irq_domain_activate(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) struct irq_data *data, bool reserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) struct gpio_chip *gc = domain->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) return gpiochip_lock_as_irq(gc, data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) * @domain: The IRQ domain used by this IRQ chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) * @data: Outermost irq_data associated with the IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) * be used as the deactivate function for the &struct irq_domain_ops. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) * host_data for the IRQ domain must be the &struct gpio_chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) struct gpio_chip *gc = domain->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) return gpiochip_unlock_as_irq(gc, data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) static int gpiochip_to_irq(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) struct irq_domain *domain = gc->irq.domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) if (!gpiochip_irqchip_irq_valid(gc, offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) if (irq_domain_is_hierarchy(domain)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) struct irq_fwspec spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) spec.fwnode = domain->fwnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) spec.param_count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) spec.param[1] = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) return irq_create_fwspec_mapping(&spec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) return irq_create_mapping(domain, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) static int gpiochip_irq_reqres(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) return gpiochip_reqres_irq(gc, d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) static void gpiochip_irq_relres(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) gpiochip_relres_irq(gc, d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) static void gpiochip_irq_mask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) if (gc->irq.irq_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) gc->irq.irq_mask(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) gpiochip_disable_irq(gc, d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) static void gpiochip_irq_unmask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) gpiochip_enable_irq(gc, d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) if (gc->irq.irq_unmask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) gc->irq.irq_unmask(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) static void gpiochip_irq_enable(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) gpiochip_enable_irq(gc, d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) gc->irq.irq_enable(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) static void gpiochip_irq_disable(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) gc->irq.irq_disable(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) gpiochip_disable_irq(gc, d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) struct irq_chip *irqchip = gc->irq.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) if (!irqchip->irq_request_resources &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) !irqchip->irq_release_resources) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) irqchip->irq_request_resources = gpiochip_irq_reqres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) irqchip->irq_release_resources = gpiochip_irq_relres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) if (WARN_ON(gc->irq.irq_enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) /* Check if the irqchip already has this hook... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (irqchip->irq_enable == gpiochip_irq_enable ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) irqchip->irq_mask == gpiochip_irq_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) * ...and if so, give a gentle warning that this is bad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) * practice.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) chip_info(gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) if (irqchip->irq_disable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) gc->irq.irq_disable = irqchip->irq_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) irqchip->irq_disable = gpiochip_irq_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) gc->irq.irq_mask = irqchip->irq_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) irqchip->irq_mask = gpiochip_irq_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) if (irqchip->irq_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) gc->irq.irq_enable = irqchip->irq_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) irqchip->irq_enable = gpiochip_irq_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) gc->irq.irq_unmask = irqchip->irq_unmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) irqchip->irq_unmask = gpiochip_irq_unmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) * @gc: the GPIO chip to add the IRQ chip to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) * @lock_key: lockdep class for IRQ lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) * @request_key: lockdep class for IRQ request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) static int gpiochip_add_irqchip(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) struct lock_class_key *request_key)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) struct irq_chip *irqchip = gc->irq.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) const struct irq_domain_ops *ops = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) unsigned int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) if (!irqchip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) if (gc->irq.parent_handler && gc->can_sleep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) np = gc->gpiodev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) type = gc->irq.default_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) * Specifying a default trigger is a terrible idea if DT or ACPI is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) * used to configure the interrupts, as you may end up with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) * conflicting triggers. Tell the user, and reset to NONE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) if (WARN(np && type != IRQ_TYPE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) "%s: Ignoring %u default trigger\n", np->full_name, type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) acpi_handle_warn(ACPI_HANDLE(gc->parent),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) "Ignoring %u default trigger\n", type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) gc->to_irq = gpiochip_to_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) gc->irq.default_type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) gc->irq.lock_key = lock_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) gc->irq.request_key = request_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) /* If a parent irqdomain is provided, let's build a hierarchy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) if (gpiochip_hierarchy_is_hierarchical(gc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) int ret = gpiochip_hierarchy_add_domain(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) /* Some drivers provide custom irqdomain ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) if (gc->irq.domain_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) ops = gc->irq.domain_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) if (!ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) ops = &gpiochip_domain_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) gc->irq.domain = irq_domain_add_simple(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) gc->ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) gc->irq.first,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) ops, gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) if (!gc->irq.domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) if (gc->irq.parent_handler) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) void *data = gc->irq.parent_handler_data ?: gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) for (i = 0; i < gc->irq.num_parents; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) * The parent IRQ chip is already using the chip_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) * for this IRQ chip, so our callbacks simply use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) * handler_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) irq_set_chained_handler_and_data(gc->irq.parents[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) gc->irq.parent_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) gpiochip_set_irq_hooks(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) acpi_gpiochip_request_interrupts(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) * @gc: the gpiochip to remove the irqchip from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) * This is called only from gpiochip_remove()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) static void gpiochip_irqchip_remove(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) struct irq_chip *irqchip = gc->irq.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) unsigned int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) acpi_gpiochip_free_interrupts(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) if (irqchip && gc->irq.parent_handler) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) struct gpio_irq_chip *irq = &gc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) for (i = 0; i < irq->num_parents; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) irq_set_chained_handler_and_data(irq->parents[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) /* Remove all IRQ mappings and delete the domain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) if (gc->irq.domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) for (offset = 0; offset < gc->ngpio; offset++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) if (!gpiochip_irqchip_irq_valid(gc, offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) irq = irq_find_mapping(gc->irq.domain, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) irq_dispose_mapping(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) irq_domain_remove(gc->irq.domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) if (irqchip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) irqchip->irq_request_resources = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) irqchip->irq_release_resources = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) if (irqchip->irq_enable == gpiochip_irq_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) irqchip->irq_enable = gc->irq.irq_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) irqchip->irq_disable = gc->irq.irq_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) gc->irq.irq_enable = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) gc->irq.irq_disable = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) gc->irq.chip = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) gpiochip_irqchip_free_valid_mask(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) * @gc: the gpiochip to add the irqchip to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) * @irqchip: the irqchip to add to the gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) * @first_irq: if not dynamically assigned, the base (first) IRQ to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) * allocate gpiochip irqs from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) * @handler: the irq handler to use (often a predefined irq core function)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) * to have the core avoid setting up any default type in the hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) * @threaded: whether this irqchip uses a nested thread handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) * @lock_key: lockdep class for IRQ lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) * @request_key: lockdep class for IRQ request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) * This function closely associates a certain irqchip with a certain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) * gpiochip, providing an irq domain to translate the local IRQs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) * global irqs in the gpiolib core, and making sure that the gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) * is passed as chip data to all related functions. Driver callbacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) * need to use gpiochip_get_data() to get their local state containers back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) * from the gpiochip passed as chip data. An irqdomain will be stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) * in the gpiochip that shall be used by the driver to handle IRQ number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) * translation. The gpiochip will need to be initialized and registered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) * before calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) * This function will handle two cell:ed simple IRQs and assumes all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) * the pins on the gpiochip can generate a unique IRQ. Everything else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) * need to be open coded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) int gpiochip_irqchip_add_key(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) struct irq_chip *irqchip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) unsigned int first_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) irq_flow_handler_t handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) bool threaded,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) struct lock_class_key *request_key)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) struct device_node *of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) if (!gc || !irqchip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) if (!gc->parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) chip_err(gc, "missing gpiochip .dev parent pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) gc->irq.threaded = threaded;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) of_node = gc->parent->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) #ifdef CONFIG_OF_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) * If the gpiochip has an assigned OF node this takes precedence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) * FIXME: get rid of this and use gc->parent->of_node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) * everywhere
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) if (gc->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) of_node = gc->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) * Specifying a default trigger is a terrible idea if DT or ACPI is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) * used to configure the interrupts, as you may end-up with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) * conflicting triggers. Tell the user, and reset to NONE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) if (WARN(of_node && type != IRQ_TYPE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) "%pOF: Ignoring %d default trigger\n", of_node, type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) acpi_handle_warn(ACPI_HANDLE(gc->parent),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) "Ignoring %d default trigger\n", type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) gc->irq.chip = irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) gc->irq.handler = handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) gc->irq.default_type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) gc->to_irq = gpiochip_to_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) gc->irq.lock_key = lock_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) gc->irq.request_key = request_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) gc->irq.domain = irq_domain_add_simple(of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) gc->ngpio, first_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) &gpiochip_domain_ops, gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) if (!gc->irq.domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) gc->irq.chip = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) gpiochip_set_irq_hooks(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) acpi_gpiochip_request_interrupts(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) * @gc: the gpiochip to add the irqchip to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) * @domain: the irqdomain to add to the gpiochip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) * This function adds an IRQ domain to the gpiochip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) struct irq_domain *domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) if (!domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) gc->to_irq = gpiochip_to_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) gc->irq.domain = domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) #else /* CONFIG_GPIOLIB_IRQCHIP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) struct lock_class_key *request_key)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) #endif /* CONFIG_GPIOLIB_IRQCHIP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) * gpiochip_generic_request() - request the gpio function for a pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) * @gc: the gpiochip owning the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) * @offset: the offset of the GPIO to request for GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) int gpiochip_generic_request(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) #ifdef CONFIG_PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) if (list_empty(&gc->gpiodev->pin_ranges))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) return pinctrl_gpio_request(gc->gpiodev->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) EXPORT_SYMBOL_GPL(gpiochip_generic_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) * gpiochip_generic_free() - free the gpio function from a pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) * @gc: the gpiochip to request the gpio function for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) * @offset: the offset of the GPIO to free from GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) void gpiochip_generic_free(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) #ifdef CONFIG_PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) if (list_empty(&gc->gpiodev->pin_ranges))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) pinctrl_gpio_free(gc->gpiodev->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) EXPORT_SYMBOL_GPL(gpiochip_generic_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) * gpiochip_generic_config() - apply configuration for a pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) * @gc: the gpiochip owning the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) * @offset: the offset of the GPIO to apply the configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) * @config: the configuration to be applied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) int gpiochip_generic_config(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) EXPORT_SYMBOL_GPL(gpiochip_generic_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) #ifdef CONFIG_PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) * @gc: the gpiochip to add the range for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) * @pctldev: the pin controller to map to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) * @gpio_offset: the start offset in the current gpio_chip number space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) * @pin_group: name of the pin group inside the pin controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) * Calling this function directly from a DeviceTree-supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) * pinctrl driver is DEPRECATED. Please see Section 2.1 of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) * Documentation/devicetree/bindings/gpio/gpio.txt on how to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) * bind pinctrl and gpio drivers via the "gpio-ranges" property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) int gpiochip_add_pingroup_range(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) unsigned int gpio_offset, const char *pin_group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) struct gpio_pin_range *pin_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) struct gpio_device *gdev = gc->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) if (!pin_range) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) chip_err(gc, "failed to allocate pin ranges\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) /* Use local offset as range ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) pin_range->range.id = gpio_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) pin_range->range.gc = gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) pin_range->range.name = gc->label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) pin_range->range.base = gdev->base + gpio_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) pin_range->pctldev = pctldev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) ret = pinctrl_get_group_pins(pctldev, pin_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) &pin_range->range.pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) &pin_range->range.npins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) kfree(pin_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) pinctrl_add_gpio_range(pctldev, &pin_range->range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) gpio_offset, gpio_offset + pin_range->range.npins - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) pinctrl_dev_get_devname(pctldev), pin_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) list_add_tail(&pin_range->node, &gdev->pin_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) * @gc: the gpiochip to add the range for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) * @pinctl_name: the dev_name() of the pin controller to map to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) * @gpio_offset: the start offset in the current gpio_chip number space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) * @pin_offset: the start offset in the pin controller number space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) * @npins: the number of pins from the offset of each pin space (GPIO and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) * pin controller) to accumulate in this range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) * 0 on success, or a negative error-code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) * Calling this function directly from a DeviceTree-supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) * pinctrl driver is DEPRECATED. Please see Section 2.1 of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) * Documentation/devicetree/bindings/gpio/gpio.txt on how to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) * bind pinctrl and gpio drivers via the "gpio-ranges" property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) unsigned int gpio_offset, unsigned int pin_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) unsigned int npins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) struct gpio_pin_range *pin_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) struct gpio_device *gdev = gc->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) if (!pin_range) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) chip_err(gc, "failed to allocate pin ranges\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) /* Use local offset as range ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) pin_range->range.id = gpio_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) pin_range->range.gc = gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) pin_range->range.name = gc->label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) pin_range->range.base = gdev->base + gpio_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) pin_range->range.pin_base = pin_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) pin_range->range.npins = npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) &pin_range->range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) if (IS_ERR(pin_range->pctldev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) ret = PTR_ERR(pin_range->pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) chip_err(gc, "could not create pin range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) kfree(pin_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) gpio_offset, gpio_offset + npins - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) pinctl_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) pin_offset, pin_offset + npins - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) list_add_tail(&pin_range->node, &gdev->pin_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) * @gc: the chip to remove all the mappings for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) struct gpio_pin_range *pin_range, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) struct gpio_device *gdev = gc->gpiodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) list_del(&pin_range->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) pinctrl_remove_gpio_range(pin_range->pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) &pin_range->range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) kfree(pin_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) #endif /* CONFIG_PINCTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) /* These "optional" allocation calls help prevent drivers from stomping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) * on each other, and help provide better diagnostics in debugfs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) * They're called even less than the "set direction" calls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) struct gpio_chip *gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) unsigned offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) if (label) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) label = kstrdup_const(label, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) if (!label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) /* NOTE: gpio_request() can be called in early boot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) desc_set_label(desc, label ? : "?");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) kfree_const(label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) if (gc->request) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) /* gc->request may sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) offset = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) if (gpiochip_line_is_valid(gc, offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) ret = gc->request(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) desc_set_label(desc, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) kfree_const(label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) clear_bit(FLAG_REQUESTED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) if (gc->get_direction) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) /* gc->get_direction may sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) gpiod_get_direction(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) * This descriptor validation needs to be inserted verbatim into each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) * function taking a descriptor, so we need to use a preprocessor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) * macro to avoid endless duplication. If the desc is NULL it is an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) * optional GPIO and calls should just bail out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) static int validate_desc(const struct gpio_desc *desc, const char *func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) if (IS_ERR(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) pr_warn("%s: invalid GPIO (errorpointer)\n", func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) return PTR_ERR(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) if (!desc->gdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) pr_warn("%s: invalid GPIO (no device)\n", func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) if (!desc->gdev->chip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) dev_warn(&desc->gdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) "%s: backing chip is gone\n", func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) #define VALIDATE_DESC(desc) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) int __valid = validate_desc(desc, __func__); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) if (__valid <= 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) return __valid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) #define VALIDATE_DESC_VOID(desc) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) int __valid = validate_desc(desc, __func__); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) if (__valid <= 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) return; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) int gpiod_request(struct gpio_desc *desc, const char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) int ret = -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) struct gpio_device *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) gdev = desc->gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) if (try_module_get(gdev->owner)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) ret = gpiod_request_commit(desc, label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) module_put(gdev->owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) get_device(&gdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) static bool gpiod_free_commit(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) bool ret = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) might_sleep();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) gpiod_unexport(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) if (gc->free) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) might_sleep_if(gc->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) gc->free(gc, gpio_chip_hwgpio(desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) kfree_const(desc->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) desc_set_label(desc, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) clear_bit(FLAG_REQUESTED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) clear_bit(FLAG_PULL_UP, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) clear_bit(FLAG_PULL_DOWN, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) clear_bit(FLAG_EDGE_RISING, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) clear_bit(FLAG_EDGE_FALLING, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) clear_bit(FLAG_IS_HOGGED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) #ifdef CONFIG_OF_DYNAMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) desc->hog = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) #ifdef CONFIG_GPIO_CDEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) WRITE_ONCE(desc->debounce_period_us, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) ret = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) blocking_notifier_call_chain(&desc->gdev->notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) GPIOLINE_CHANGED_RELEASED, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) void gpiod_free(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (desc && desc->gdev && gpiod_free_commit(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) module_put(desc->gdev->owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) put_device(&desc->gdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) WARN_ON(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) * gpiochip_is_requested - return string iff signal was requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) * @gc: controller managing the signal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) * @offset: of signal within controller's 0..(ngpio - 1) range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) * Returns NULL if the GPIO is not currently requested, else a string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) * The string returned is the label passed to gpio_request(); if none has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) * passed it is a meaningless, non-NULL constant.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) * This function is for use by GPIO controller drivers. The label can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) * help with diagnostics, and knowing that the signal is used as a GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) * can help avoid accidentally multiplexing it to another controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) if (offset >= gc->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) desc = gpiochip_get_desc(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) if (IS_ERR(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) return desc->label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) EXPORT_SYMBOL_GPL(gpiochip_is_requested);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) * @gc: GPIO chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) * @hwnum: hardware number of the GPIO for which to request the descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) * @label: label for the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) * specify things like line inversion semantics with the machine flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) * such as GPIO_OUT_LOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) * @dflags: descriptor request flags for this GPIO or 0 if default, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) * can be used to specify consumer semantics such as open drain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) * Function allows GPIO chip drivers to request and use their own GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) * descriptors via gpiolib API. Difference to gpiod_request() is that this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) * function will not increase reference count of the GPIO chip module. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) * allows the GPIO chip module to be unloaded as needed (we assume that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) * GPIO chip driver handles freeing the GPIOs it has requested).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) * code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) unsigned int hwnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) const char *label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) enum gpio_lookup_flags lflags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) enum gpiod_flags dflags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) if (IS_ERR(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) chip_err(gc, "failed to get GPIO descriptor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) ret = gpiod_request_commit(desc, label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) ret = gpiod_configure_flags(desc, label, lflags, dflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) chip_err(gc, "setup of own GPIO %s failed\n", label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) gpiod_free_commit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) * gpiochip_free_own_desc - Free GPIO requested by the chip driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) * @desc: GPIO descriptor to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) * Function frees the given GPIO requested previously with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) * gpiochip_request_own_desc().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) void gpiochip_free_own_desc(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) if (desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) gpiod_free_commit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) * Drivers MUST set GPIO direction before making get/set calls. In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) * some cases this is done in early boot, before IRQs are enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) * As a rule these aren't called more than once (except for drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) * using the open-drain emulation idiom) so these are natural places
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) * to accumulate extra debugging checks. Note that we can't (yet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) * rely on gpio_request() having been called beforehand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) if (!gc->set_config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) return gc->set_config(gc, offset, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) struct gpio_chip *gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) unsigned long config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) unsigned arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) case PIN_CONFIG_BIAS_PULL_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) case PIN_CONFIG_BIAS_PULL_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) arg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) arg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) config = PIN_CONF_PACKED(mode, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) static int gpio_set_bias(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) int bias = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) bias = PIN_CONFIG_BIAS_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) else if (test_bit(FLAG_PULL_UP, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) bias = PIN_CONFIG_BIAS_PULL_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) bias = PIN_CONFIG_BIAS_PULL_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) if (bias) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) ret = gpio_set_config(desc, bias);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) if (ret != -ENOTSUPP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) * gpiod_direction_input - set the GPIO direction to input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) * @desc: GPIO to set to input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) * be called safely on it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) * Return 0 in case of success, else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) int gpiod_direction_input(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) * It is legal to have no .get() and .direction_input() specified if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) * the chip is output-only, but you can't specify .direction_input()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) * and not support the .get() operation, that doesn't make sense.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) if (!gc->get && gc->direction_input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) gpiod_warn(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) "%s: missing get() but have direction_input()\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) * If we have a .direction_input() callback, things are simple,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) * just call it. Else we are some input-only chip so try to check the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) * direction (if .get_direction() is supported) else we silently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) * assume we are in input mode after this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) if (gc->direction_input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) } else if (gc->get_direction &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) gpiod_warn(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) "%s: missing direction_input() operation and line is output\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) clear_bit(FLAG_IS_OUT, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) ret = gpio_set_bias(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) trace_gpio_direction(desc_to_gpio(desc), 1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) EXPORT_SYMBOL_GPL(gpiod_direction_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) struct gpio_chip *gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) int val = !!value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) * It's OK not to specify .direction_output() if the gpiochip is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) * output-only, but if there is then not even a .set() operation it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) * is pretty tricky to drive the output line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) if (!gc->set && !gc->direction_output) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) gpiod_warn(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) "%s: missing set() and direction_output() operations\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) if (gc->direction_output) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) /* Check that we are in output mode if we can */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) if (gc->get_direction &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) gpiod_warn(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) "%s: missing direction_output() operation\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) * If we can't actively set the direction, we are some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) * output-only chip, so just drive the output as desired.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) gc->set(gc, gpio_chip_hwgpio(desc), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) set_bit(FLAG_IS_OUT, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) trace_gpio_value(desc_to_gpio(desc), 0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) trace_gpio_direction(desc_to_gpio(desc), 0, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) * gpiod_direction_output_raw - set the GPIO direction to output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) * @desc: GPIO to set to output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) * @value: initial output value of the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) * be called safely on it. The initial value of the output must be specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) * as raw value on the physical line without regard for the ACTIVE_LOW status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) * Return 0 in case of success, else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) return gpiod_direction_output_raw_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) * gpiod_direction_output - set the GPIO direction to output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) * @desc: GPIO to set to output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) * @value: initial output value of the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) * be called safely on it. The initial value of the output must be specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) * account.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) * Return 0 in case of success, else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) int gpiod_direction_output(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) value = !!value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) /* GPIOs used for enabled IRQs shall not be set as output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) gpiod_err(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) "%s: tried to set a GPIO tied to an IRQ as output\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) /* First see if we can enable open drain in hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) goto set_output_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) /* Emulate open drain by not actively driving the line high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) ret = gpiod_direction_input(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) goto set_output_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) goto set_output_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) /* Emulate open source by not actively driving the line low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) if (!value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) ret = gpiod_direction_input(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) goto set_output_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) set_output_value:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) ret = gpio_set_bias(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) return gpiod_direction_output_raw_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) set_output_flag:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) * When emulating open-source or open-drain functionalities by not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) * actively driving the line (setting mode to input) we still need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) * set the IS_OUT flag or otherwise we won't be able to set the line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) * value anymore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) set_bit(FLAG_IS_OUT, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) EXPORT_SYMBOL_GPL(gpiod_direction_output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) * gpiod_set_config - sets @config for a GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) * @desc: descriptor of the GPIO for which to set the configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) * @config: Same packed config format as generic pinconf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) * configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) EXPORT_SYMBOL_GPL(gpiod_set_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) * gpiod_set_debounce - sets @debounce time for a GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) * @desc: descriptor of the GPIO for which to set debounce time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) * @debounce: debounce time in microseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) * debounce time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) unsigned long config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) return gpiod_set_config(desc, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) EXPORT_SYMBOL_GPL(gpiod_set_debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) * @desc: descriptor of the GPIO for which to configure persistence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) * @transitory: True to lose state on suspend or reset, false for persistence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) * 0 on success, otherwise a negative error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) unsigned long packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) int gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) * persistence state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) /* If the driver supports it, set the persistence state now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) if (!gc->set_config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) !transitory);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) gpio = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) rc = gpio_do_set_config(gc, gpio, packed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) if (rc == -ENOTSUPP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) EXPORT_SYMBOL_GPL(gpiod_set_transitory);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) * gpiod_is_active_low - test whether a GPIO is active-low or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) * @desc: the gpio descriptor to test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) * Returns 1 if the GPIO is active-low, 0 otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) int gpiod_is_active_low(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) EXPORT_SYMBOL_GPL(gpiod_is_active_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) * @desc: the gpio descriptor to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) void gpiod_toggle_active_low(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) VALIDATE_DESC_VOID(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) change_bit(FLAG_ACTIVE_LOW, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) /* I/O calls are only valid after configuration completed; the relevant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) * "is this a valid GPIO" error checks should already have been done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) * "Get" operations are often inlinable as reading a pin value register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) * and masking the relevant bit in that register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) * When "set" operations are inlinable, they involve writing that mask to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) * one register to set a low value, or a different register to set it high.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) * Otherwise locking is needed, so there may be little value to inlining.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) *------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) * have requested the GPIO. That can include implicit requesting by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) * a direction setting call. Marking a gpio as requested locks its chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) * in memory, guaranteeing that these table lookups need no more locking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) * and that gpiochip_remove() will fail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) * REVISIT when debugging, consider adding some instrumentation to ensure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) * that the GPIO was actually requested.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) offset = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) value = gc->get ? gc->get(gc, offset) : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) value = value < 0 ? value : !!value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) trace_gpio_value(desc_to_gpio(desc), 1, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) static int gpio_chip_get_multiple(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) unsigned long *mask, unsigned long *bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) if (gc->get_multiple) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) return gc->get_multiple(gc, mask, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) } else if (gc->get) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) int i, value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) for_each_set_bit(i, mask, gc->ngpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) value = gc->get(gc, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) __assign_bit(i, bits, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) int gpiod_get_array_value_complex(bool raw, bool can_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) int ret, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) * Validate array_info against desc_array and its size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) * It should immediately follow desc_array if both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) * have been obtained from the same gpiod_get_array() call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) if (array_info && array_info->desc == desc_array &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) array_size <= array_info->size &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) (void *)array_info == desc_array + array_info->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) if (!can_sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) WARN_ON(array_info->chip->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) ret = gpio_chip_get_multiple(array_info->chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) array_info->get_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) bitmap_xor(value_bitmap, value_bitmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) array_info->invert_mask, array_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) i = find_first_zero_bit(array_info->get_mask, array_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) if (i == array_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) array_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) while (i < array_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) struct gpio_chip *gc = desc_array[i]->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) unsigned long *mask, *bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) int first, j, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) mask = fastpath;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) sizeof(*mask),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) can_sleep ? GFP_KERNEL : GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) if (!mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) bits = mask + BITS_TO_LONGS(gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) bitmap_zero(mask, gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) if (!can_sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) WARN_ON(gc->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) /* collect all inputs belonging to the same chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) first = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) const struct gpio_desc *desc = desc_array[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) int hwgpio = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) __set_bit(hwgpio, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) if (array_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) i = find_next_zero_bit(array_info->get_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) array_size, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) } while ((i < array_size) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) (desc_array[i]->gdev->chip == gc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) ret = gpio_chip_get_multiple(gc, mask, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) if (mask != fastpath)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) kfree(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) for (j = first; j < i; ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) const struct gpio_desc *desc = desc_array[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) int hwgpio = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) int value = test_bit(hwgpio, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) __assign_bit(j, value_bitmap, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) trace_gpio_value(desc_to_gpio(desc), 1, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) if (array_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) j = find_next_zero_bit(array_info->get_mask, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) if (mask != fastpath)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) kfree(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) * gpiod_get_raw_value() - return a gpio's raw value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) * @desc: gpio whose value will be returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) * Return the GPIO's raw value, i.e. the value of the physical line disregarding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) * its ACTIVE_LOW status, or negative errno on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) * This function can be called from contexts where we cannot sleep, and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) * complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) int gpiod_get_raw_value(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) /* Should be using gpiod_get_raw_value_cansleep() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) WARN_ON(desc->gdev->chip->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) return gpiod_get_raw_value_commit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) * gpiod_get_value() - return a gpio's value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) * @desc: gpio whose value will be returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) * account, or negative errno on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) * This function can be called from contexts where we cannot sleep, and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) * complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) int gpiod_get_value(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) /* Should be using gpiod_get_value_cansleep() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) WARN_ON(desc->gdev->chip->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) value = gpiod_get_raw_value_commit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) EXPORT_SYMBOL_GPL(gpiod_get_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) * @desc_array: array of GPIO descriptors whose values will be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) * @value_bitmap: bitmap to store the read values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) * Read the raw values of the GPIOs, i.e. the values of the physical lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) * without regard for their ACTIVE_LOW status. Return 0 in case of success,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) * else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) * This function can be called from contexts where we cannot sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) * and it will complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) int gpiod_get_raw_array_value(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) return gpiod_get_array_value_complex(true, false, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) desc_array, array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) * gpiod_get_array_value() - read values from an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) * @desc_array: array of GPIO descriptors whose values will be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) * @value_bitmap: bitmap to store the read values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) * into account. Return 0 in case of success, else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) * This function can be called from contexts where we cannot sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) * and it will complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) int gpiod_get_array_value(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) return gpiod_get_array_value_complex(false, false, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) desc_array, array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) EXPORT_SYMBOL_GPL(gpiod_get_array_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) * @desc: gpio descriptor whose state need to be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) struct gpio_chip *gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) int offset = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) ret = gc->direction_input(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) ret = gc->direction_output(gc, offset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) set_bit(FLAG_IS_OUT, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) trace_gpio_direction(desc_to_gpio(desc), value, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) gpiod_err(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) "%s: Error in set_value for open drain err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) * _gpio_set_open_source_value() - Set the open source gpio's value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) * @desc: gpio descriptor whose state need to be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) struct gpio_chip *gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) int offset = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) ret = gc->direction_output(gc, offset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) set_bit(FLAG_IS_OUT, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) ret = gc->direction_input(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) trace_gpio_direction(desc_to_gpio(desc), !value, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) gpiod_err(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) "%s: Error in set_value for open source err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) trace_gpio_value(desc_to_gpio(desc), 0, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) gc->set(gc, gpio_chip_hwgpio(desc), value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) * set multiple outputs on the same chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) * use the chip's set_multiple function if available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) * otherwise set the outputs sequentially;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) * @chip: the GPIO chip we operate on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) * defines which outputs are to be changed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) * defines the values the outputs specified by mask are to be set to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) static void gpio_chip_set_multiple(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) unsigned long *mask, unsigned long *bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) if (gc->set_multiple) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) gc->set_multiple(gc, mask, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) /* set outputs if the corresponding mask bit is set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) for_each_set_bit(i, mask, gc->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) gc->set(gc, i, test_bit(i, bits));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) int gpiod_set_array_value_complex(bool raw, bool can_sleep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) * Validate array_info against desc_array and its size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) * It should immediately follow desc_array if both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) * have been obtained from the same gpiod_get_array() call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) if (array_info && array_info->desc == desc_array &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) array_size <= array_info->size &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) (void *)array_info == desc_array + array_info->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) if (!can_sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) WARN_ON(array_info->chip->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) bitmap_xor(value_bitmap, value_bitmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) array_info->invert_mask, array_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) i = find_first_zero_bit(array_info->set_mask, array_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) if (i == array_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) array_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) while (i < array_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) struct gpio_chip *gc = desc_array[i]->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) unsigned long *mask, *bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) mask = fastpath;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) sizeof(*mask),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) can_sleep ? GFP_KERNEL : GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) if (!mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) bits = mask + BITS_TO_LONGS(gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) bitmap_zero(mask, gc->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) if (!can_sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) WARN_ON(gc->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) struct gpio_desc *desc = desc_array[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) int hwgpio = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) int value = test_bit(i, value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) * Pins applicable for fast input but not for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) * fast output processing may have been already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) * inverted inside the fast path, skip them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) if (!raw && !(array_info &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) test_bit(i, array_info->invert_mask)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) test_bit(FLAG_ACTIVE_LOW, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) trace_gpio_value(desc_to_gpio(desc), 0, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) * collect all normal outputs belonging to the same chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) * open drain and open source outputs are set individually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) gpio_set_open_drain_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) gpio_set_open_source_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) __set_bit(hwgpio, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) __assign_bit(hwgpio, bits, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) if (array_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) i = find_next_zero_bit(array_info->set_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) array_size, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) } while ((i < array_size) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) (desc_array[i]->gdev->chip == gc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) /* push collected bits to outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) if (count != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) gpio_chip_set_multiple(gc, mask, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) if (mask != fastpath)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) kfree(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) * gpiod_set_raw_value() - assign a gpio's raw value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) * @desc: gpio whose value will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) * @value: value to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) * Set the raw value of the GPIO, i.e. the value of its physical line without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) * regard for its ACTIVE_LOW status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) * This function can be called from contexts where we cannot sleep, and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) * complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) void gpiod_set_raw_value(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) VALIDATE_DESC_VOID(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) /* Should be using gpiod_set_raw_value_cansleep() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) WARN_ON(desc->gdev->chip->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) gpiod_set_raw_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) * gpiod_set_value_nocheck() - set a GPIO line value without checking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) * @desc: the descriptor to set the value on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) * @value: value to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) * This sets the value of a GPIO line backing a descriptor, applying
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) * different semantic quirks like active low and open drain/source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) * handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) gpio_set_open_drain_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) gpio_set_open_source_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) gpiod_set_raw_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) * gpiod_set_value() - assign a gpio's value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) * @desc: gpio whose value will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) * @value: value to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) * OPEN_DRAIN and OPEN_SOURCE flags into account.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) * This function can be called from contexts where we cannot sleep, and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) * complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) void gpiod_set_value(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) VALIDATE_DESC_VOID(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) /* Should be using gpiod_set_value_cansleep() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) WARN_ON(desc->gdev->chip->can_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) gpiod_set_value_nocheck(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) EXPORT_SYMBOL_GPL(gpiod_set_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) * gpiod_set_raw_array_value() - assign values to an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) * @desc_array: array of GPIO descriptors whose values will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) * @value_bitmap: bitmap of values to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) * Set the raw values of the GPIOs, i.e. the values of the physical lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) * without regard for their ACTIVE_LOW status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) * This function can be called from contexts where we cannot sleep, and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) * complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) int gpiod_set_raw_array_value(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) return gpiod_set_array_value_complex(true, false, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) desc_array, array_info, value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) * gpiod_set_array_value() - assign values to an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) * @desc_array: array of GPIO descriptors whose values will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) * @value_bitmap: bitmap of values to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) * into account.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) * This function can be called from contexts where we cannot sleep, and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) * complain if the GPIO chip functions potentially sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) int gpiod_set_array_value(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) return gpiod_set_array_value_complex(false, false, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) desc_array, array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) EXPORT_SYMBOL_GPL(gpiod_set_array_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) * gpiod_cansleep() - report whether gpio value access may sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) * @desc: gpio to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) int gpiod_cansleep(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) return desc->gdev->chip->can_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) EXPORT_SYMBOL_GPL(gpiod_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) * gpiod_set_consumer_name() - set the consumer name for the descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) * @desc: gpio to set the consumer name on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) * @name: the new consumer name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) if (name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) name = kstrdup_const(name, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) if (!name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) kfree_const(desc->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) desc_set_label(desc, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) * gpiod_to_irq() - return the IRQ corresponding to a GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) * @desc: gpio whose IRQ will be returned (already requested)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) * Return the IRQ corresponding to the passed GPIO, or an error code in case of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) * error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) int gpiod_to_irq(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) * requires this function to not return zero on an invalid descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) * but rather a negative error number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) gc = desc->gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) offset = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) if (gc->to_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) int retirq = gc->to_irq(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) /* Zero means NO_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) if (!retirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) return retirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) #ifdef CONFIG_GPIOLIB_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) if (gc->irq.chip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) * Avoid race condition with other code, which tries to lookup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) * an IRQ before the irqchip has been properly registered,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) * i.e. while gpiochip is still being brought up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) EXPORT_SYMBOL_GPL(gpiod_to_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) * @gc: the chip the GPIO to lock belongs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) * @offset: the offset of the GPIO to lock as IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) * This is used directly by GPIO drivers that want to lock down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) * a certain GPIO line to be used for IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) desc = gpiochip_get_desc(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) if (IS_ERR(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) return PTR_ERR(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) * If it's fast: flush the direction setting if something changed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) * behind our back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) if (!gc->can_sleep && gc->get_direction) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) int dir = gpiod_get_direction(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) if (dir < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) chip_err(gc, "%s: cannot get GPIO direction\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) return dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) /* To be valid for IRQ the line needs to be input or open drain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) if (test_bit(FLAG_IS_OUT, &desc->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) chip_err(gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) "%s: tried to flag a GPIO set as output for IRQ\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) set_bit(FLAG_USED_AS_IRQ, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) * If the consumer has not set up a label (such as when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) * IRQ is referenced from .to_irq()) we set up a label here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) * so it is clear this is used as an interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) if (!desc->label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) desc_set_label(desc, "interrupt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) * @gc: the chip the GPIO to lock belongs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) * @offset: the offset of the GPIO to lock as IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) * This is used directly by GPIO drivers that want to indicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) * that a certain GPIO is no longer used exclusively for IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) desc = gpiochip_get_desc(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) if (IS_ERR(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) /* If we only had this marking, erase it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) if (desc->label && !strcmp(desc->label, "interrupt"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) desc_set_label(desc, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) if (!IS_ERR(desc) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) if (!IS_ERR(desc) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) * We must not be output when using IRQ UNLESS we are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) * open drain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) if (offset >= gc->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) if (!try_module_get(gc->gpiodev->owner))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) ret = gpiochip_lock_as_irq(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) module_put(gc->gpiodev->owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) gpiochip_unlock_as_irq(gc, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) module_put(gc->gpiodev->owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) if (offset >= gc->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) if (offset >= gc->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) if (offset >= gc->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) * gpiod_get_raw_value_cansleep() - return a gpio's raw value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) * @desc: gpio whose value will be returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) * Return the GPIO's raw value, i.e. the value of the physical line disregarding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) * its ACTIVE_LOW status, or negative errno on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) return gpiod_get_raw_value_commit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) * gpiod_get_value_cansleep() - return a gpio's value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) * @desc: gpio whose value will be returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) * account, or negative errno on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) int gpiod_get_value_cansleep(const struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) VALIDATE_DESC(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) value = gpiod_get_raw_value_commit(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) * @desc_array: array of GPIO descriptors whose values will be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) * @value_bitmap: bitmap to store the read values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) * Read the raw values of the GPIOs, i.e. the values of the physical lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) * without regard for their ACTIVE_LOW status. Return 0 in case of success,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) * else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) return gpiod_get_array_value_complex(true, true, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) desc_array, array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) * @desc_array: array of GPIO descriptors whose values will be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) * @value_bitmap: bitmap to store the read values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) * into account. Return 0 in case of success, else an error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) int gpiod_get_array_value_cansleep(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) return gpiod_get_array_value_complex(false, true, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) desc_array, array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) * @desc: gpio whose value will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) * @value: value to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) * Set the raw value of the GPIO, i.e. the value of its physical line without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) * regard for its ACTIVE_LOW status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) VALIDATE_DESC_VOID(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) gpiod_set_raw_value_commit(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) * gpiod_set_value_cansleep() - assign a gpio's value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) * @desc: gpio whose value will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) * @value: value to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) * account
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) VALIDATE_DESC_VOID(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) gpiod_set_value_nocheck(desc, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) * @desc_array: array of GPIO descriptors whose values will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) * @value_bitmap: bitmap of values to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) * Set the raw values of the GPIOs, i.e. the values of the physical lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) * without regard for their ACTIVE_LOW status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) return gpiod_set_array_value_complex(true, true, array_size, desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) array_info, value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) * gpiod_add_lookup_tables() - register GPIO device consumers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) * @tables: list of tables of consumers to register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) * @n: number of tables in the list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) mutex_lock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) for (i = 0; i < n; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) list_add_tail(&tables[i]->list, &gpio_lookup_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) mutex_unlock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) * @array_size: number of elements in the descriptor array / value bitmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) * @desc_array: array of GPIO descriptors whose values will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) * @array_info: information on applicability of fast bitmap processing path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) * @value_bitmap: bitmap of values to assign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) * into account.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) * This function is to be called from contexts that can sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) int gpiod_set_array_value_cansleep(unsigned int array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) struct gpio_desc **desc_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) struct gpio_array *array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) unsigned long *value_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) might_sleep_if(extra_checks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) if (!desc_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) return gpiod_set_array_value_complex(false, true, array_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) desc_array, array_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) value_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) * gpiod_add_lookup_table() - register GPIO device consumers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) * @table: table of consumers to register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) mutex_lock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) list_add_tail(&table->list, &gpio_lookup_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) mutex_unlock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) * gpiod_remove_lookup_table() - unregister GPIO device consumers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) * @table: table of consumers to unregister
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) mutex_lock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) list_del(&table->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) mutex_unlock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) * gpiod_add_hogs() - register a set of GPIO hogs from machine code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) * @hogs: table of gpio hog entries with a zeroed sentinel at the end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) void gpiod_add_hogs(struct gpiod_hog *hogs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) struct gpiod_hog *hog;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) mutex_lock(&gpio_machine_hogs_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) for (hog = &hogs[0]; hog->chip_label; hog++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) list_add_tail(&hog->list, &gpio_machine_hogs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) * The chip may have been registered earlier, so check if it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) * exists and, if so, try to hog the line now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) gc = find_chip_by_name(hog->chip_label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) if (gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) gpiochip_machine_hog(gc, hog);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) mutex_unlock(&gpio_machine_hogs_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) EXPORT_SYMBOL_GPL(gpiod_add_hogs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) const char *dev_id = dev ? dev_name(dev) : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) struct gpiod_lookup_table *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) mutex_lock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) list_for_each_entry(table, &gpio_lookup_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) if (table->dev_id && dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) * Valid strings on both ends, must be identical to have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) * a match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) if (!strcmp(table->dev_id, dev_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) * One of the pointers is NULL, so both must be to have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) * a match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) if (dev_id == table->dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) table = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) mutex_unlock(&gpio_lookup_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) return table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) unsigned int idx, unsigned long *flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) struct gpio_desc *desc = ERR_PTR(-ENOENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) struct gpiod_lookup_table *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) struct gpiod_lookup *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) table = gpiod_find_lookup_table(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) if (!table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) for (p = &table->table[0]; p->key; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) /* idx must always match exactly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) if (p->idx != idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) /* If the lookup entry has a con_id, require exact match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) if (p->chip_hwnum == U16_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) desc = gpio_name_to_desc(p->key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) if (desc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) *flags = p->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) dev_warn(dev, "cannot find GPIO line %s, deferring\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) p->key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) return ERR_PTR(-EPROBE_DEFER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) gc = find_chip_by_name(p->key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) if (!gc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) * As the lookup table indicates a chip with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) * p->key should exist, assume it may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) * still appear later and let the interested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) * consumer be probed again or let the Deferred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) * Probe infrastructure handle the error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) p->key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) return ERR_PTR(-EPROBE_DEFER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) if (gc->ngpio <= p->chip_hwnum) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) idx, p->chip_hwnum, gc->ngpio - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) gc->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) desc = gpiochip_get_desc(gc, p->chip_hwnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) *flags = p->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) static int platform_gpio_count(struct device *dev, const char *con_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) struct gpiod_lookup_table *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) struct gpiod_lookup *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) unsigned int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) table = gpiod_find_lookup_table(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) if (!table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) for (p = &table->table[0]; p->key; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) (!con_id && !p->con_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) if (!count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) * fwnode_gpiod_get_index - obtain a GPIO from firmware node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) * @fwnode: handle of the firmware node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) * @index: index of the GPIO to obtain for the consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) * @flags: GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) * @label: label to attach to the requested GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) * This function can be used for drivers that get their configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) * from opaque firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) * The function properly finds the corresponding GPIO using whatever is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) * underlying firmware interface and then makes sure that the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) * descriptor is requested before it is returned to the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) * On successful request the GPIO pin is configured in accordance with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) * provided @flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) * In case of error an ERR_PTR() is returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) const char *con_id, int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) enum gpiod_flags flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) const char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) char prop_name[32]; /* 32 is max size of property name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) if (con_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) snprintf(prop_name, sizeof(prop_name), "%s-%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) con_id, gpio_suffixes[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) snprintf(prop_name, sizeof(prop_name), "%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) gpio_suffixes[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) * gpiod_count - return the number of GPIOs associated with a device / function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) * or -ENOENT if no GPIO has been assigned to the requested function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) int gpiod_count(struct device *dev, const char *con_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) int count = -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) count = of_gpio_get_count(dev, con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) count = acpi_gpio_count(dev, con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) if (count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) count = platform_gpio_count(dev, con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) EXPORT_SYMBOL_GPL(gpiod_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) * gpiod_get - obtain a GPIO for a given GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) * @flags: optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) * Return the GPIO descriptor corresponding to the function con_id of device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) * dev, -ENOENT if no GPIO has been assigned to the requested function, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) enum gpiod_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) return gpiod_get_index(dev, con_id, 0, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) EXPORT_SYMBOL_GPL(gpiod_get);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) * @flags: optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) * the requested function it will return NULL. This is convenient for drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) * that need to handle optional GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) enum gpiod_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) return gpiod_get_index_optional(dev, con_id, 0, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) EXPORT_SYMBOL_GPL(gpiod_get_optional);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) * gpiod_configure_flags - helper function to configure a given GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) * @desc: gpio whose value will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) * of_find_gpio() or of_get_gpio_hog()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) * @dflags: gpiod_flags - optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) * Return 0 on success, -ENOENT if no GPIO has been assigned to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) * requested function and/or index, or another IS_ERR() code if an error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) * occurred while trying to acquire the GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) unsigned long lflags, enum gpiod_flags dflags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) if (lflags & GPIO_ACTIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) set_bit(FLAG_ACTIVE_LOW, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) if (lflags & GPIO_OPEN_DRAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) set_bit(FLAG_OPEN_DRAIN, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) * This enforces open drain mode from the consumer side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) * This is necessary for some busses like I2C, but the lookup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) * should *REALLY* have specified them as open drain in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) * first place, so print a little warning here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) set_bit(FLAG_OPEN_DRAIN, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) gpiod_warn(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) if (lflags & GPIO_OPEN_SOURCE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) set_bit(FLAG_OPEN_SOURCE, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) gpiod_err(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) "both pull-up and pull-down enabled, invalid configuration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) if (lflags & GPIO_PULL_UP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) set_bit(FLAG_PULL_UP, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) else if (lflags & GPIO_PULL_DOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) set_bit(FLAG_PULL_DOWN, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) /* No particular flag request, return here... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) gpiod_dbg(desc, "no flags found for %s\n", con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) /* Process flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) ret = gpiod_direction_output(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) ret = gpiod_direction_input(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) * @idx: index of the GPIO to obtain in the consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) * @flags: optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) * This variant of gpiod_get() allows to access GPIOs other than the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) * defined one for functions that define several GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) * requested function and/or index, or another IS_ERR() code if an error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) * occurred while trying to acquire the GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) unsigned int idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963) enum gpiod_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) struct gpio_desc *desc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) /* Maybe we have a device name, maybe not */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) const char *devname = dev ? dev_name(dev) : "?";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) if (dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) /* Using device tree? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) dev_dbg(dev, "using device tree for GPIO lookup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) desc = of_find_gpio(dev, con_id, idx, &lookupflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) } else if (ACPI_COMPANION(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) dev_dbg(dev, "using ACPI for GPIO lookup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) * Either we are not using DT or ACPI, or their lookup did not return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) * a result. In that case, use platform lookup as a fallback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) if (!desc || desc == ERR_PTR(-ENOENT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) dev_dbg(dev, "using lookup tables for GPIO lookup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) desc = gpiod_find(dev, con_id, idx, &lookupflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) if (IS_ERR(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) * If a connection label was passed use that, else attempt to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) * the device name as label
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) ret = gpiod_request(desc, con_id ? con_id : devname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) * This happens when there are several consumers for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) * the same GPIO line: we just return here without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) * further initialization. It is a bit if a hack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) * This is necessary to support fixed regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) * FIXME: Make this more sane and safe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) dev_info(dev, "nonexclusive access to GPIO for %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) con_id ? con_id : devname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) gpiod_put(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) blocking_notifier_call_chain(&desc->gdev->notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) GPIOLINE_CHANGED_REQUESTED, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) EXPORT_SYMBOL_GPL(gpiod_get_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) * fwnode_get_named_gpiod - obtain a GPIO from firmware node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) * @fwnode: handle of the firmware node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) * @propname: name of the firmware property representing the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) * @index: index of the GPIO to obtain for the consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) * @dflags: GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) * @label: label to attach to the requested GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) * This function can be used for drivers that get their configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) * from opaque firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) * The function properly finds the corresponding GPIO using whatever is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) * underlying firmware interface and then makes sure that the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) * descriptor is requested before it is returned to the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) * On successful request the GPIO pin is configured in accordance with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) * provided @dflags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) * In case of error an ERR_PTR() is returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) const char *propname, int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) enum gpiod_flags dflags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) const char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) struct gpio_desc *desc = ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) if (!fwnode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) if (is_of_node(fwnode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) desc = gpiod_get_from_of_node(to_of_node(fwnode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) propname, index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) dflags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) } else if (is_acpi_node(fwnode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) struct acpi_gpio_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) if (IS_ERR(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) acpi_gpio_update_gpiod_flags(&dflags, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082) acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) /* Currently only ACPI takes this path */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) ret = gpiod_request(desc, label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090) ret = gpiod_configure_flags(desc, propname, lflags, dflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) gpiod_put(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) blocking_notifier_call_chain(&desc->gdev->notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) GPIOLINE_CHANGED_REQUESTED, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) * function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) * @index: index of the GPIO to obtain in the consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) * @flags: optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) * This is equivalent to gpiod_get_index(), except that when no GPIO with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) * specified index was assigned to the requested function it will return NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) * This is convenient for drivers that need to handle optional GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) enum gpiod_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) desc = gpiod_get_index(dev, con_id, index, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) if (IS_ERR(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) if (PTR_ERR(desc) == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) * gpiod_hog - Hog the specified GPIO desc given the provided flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134) * @desc: gpio whose value will be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) * @name: gpio line name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) * of_find_gpio() or of_get_gpio_hog()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) * @dflags: gpiod_flags - optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) int gpiod_hog(struct gpio_desc *desc, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) unsigned long lflags, enum gpiod_flags dflags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) struct gpio_desc *local_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) int hwnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) gc = gpiod_to_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) hwnum = gpio_chip_hwgpio(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) local_desc = gpiochip_request_own_desc(gc, hwnum, name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) lflags, dflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) if (IS_ERR(local_desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) ret = PTR_ERR(local_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) name, gc->label, hwnum, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) /* Mark GPIO as hogged so it can be identified and removed later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) set_bit(FLAG_IS_HOGGED, &desc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) gpiod_info(desc, "hogged as %s%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) * @gc: gpio chip to act on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) static void gpiochip_free_hogs(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) for (id = 0; id < gc->ngpio; id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) * @flags: optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) * This function acquires all the GPIOs defined under a given function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) * no GPIO has been assigned to the requested function, or another IS_ERR()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) * code if an error occurred while trying to acquire the GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) enum gpiod_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) struct gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) struct gpio_descs *descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) struct gpio_array *array_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) int count, bitmap_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) count = gpiod_count(dev, con_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) if (count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) return ERR_PTR(count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) if (!descs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) for (descs->ndescs = 0; descs->ndescs < count; ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) if (IS_ERR(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) gpiod_put_array(descs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) return ERR_CAST(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) descs->desc[descs->ndescs] = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) gc = gpiod_to_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) * If pin hardware number of array member 0 is also 0, select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) * its chip as a candidate for fast bitmap processing path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) struct gpio_descs *array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) gc->ngpio : count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) array = kzalloc(struct_size(descs, desc, count) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) struct_size(array_info, invert_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) 3 * bitmap_size), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238) if (!array) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) gpiod_put_array(descs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) memcpy(array, descs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) struct_size(descs, desc, descs->ndescs + 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) kfree(descs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) descs = array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248) array_info = (void *)(descs->desc + count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) array_info->get_mask = array_info->invert_mask +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) bitmap_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) array_info->set_mask = array_info->get_mask +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) bitmap_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254) array_info->desc = descs->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) array_info->size = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) array_info->chip = gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) bitmap_set(array_info->get_mask, descs->ndescs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) count - descs->ndescs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259) bitmap_set(array_info->set_mask, descs->ndescs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260) count - descs->ndescs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) descs->info = array_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) /* Unmark array members which don't belong to the 'fast' chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264) if (array_info && array_info->chip != gc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265) __clear_bit(descs->ndescs, array_info->get_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) __clear_bit(descs->ndescs, array_info->set_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) * Detect array members which belong to the 'fast' chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) * but their pins are not in hardware order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) else if (array_info &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273) gpio_chip_hwgpio(desc) != descs->ndescs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) * Don't use fast path if all array members processed so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) * far belong to the same chip as this one but its pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277) * hardware number is different from its array index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) if (bitmap_full(array_info->get_mask, descs->ndescs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) array_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) __clear_bit(descs->ndescs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283) array_info->get_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) __clear_bit(descs->ndescs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) array_info->set_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) } else if (array_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) /* Exclude open drain or open source from fast output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) gpiochip_line_is_open_source(gc, descs->ndescs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) __clear_bit(descs->ndescs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292) array_info->set_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) /* Identify 'fast' pins which require invertion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) if (gpiod_is_active_low(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295) __set_bit(descs->ndescs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) array_info->invert_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) descs->ndescs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) if (array_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) dev_dbg(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) array_info->chip->label, array_info->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) *array_info->get_mask, *array_info->set_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) *array_info->invert_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) return descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) EXPORT_SYMBOL_GPL(gpiod_get_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313) * function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) * @dev: GPIO consumer, can be NULL for system-global GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) * @con_id: function within the GPIO consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) * @flags: optional GPIO initialization flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) * This is equivalent to gpiod_get_array(), except that when no GPIO was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) * assigned to the requested function it will return NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) const char *con_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323) enum gpiod_flags flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) struct gpio_descs *descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) descs = gpiod_get_array(dev, con_id, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) if (PTR_ERR(descs) == -ENOENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331) return descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333) EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) * gpiod_put - dispose of a GPIO descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) * @desc: GPIO descriptor to dispose of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339) * No descriptor can be used after gpiod_put() has been called on it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341) void gpiod_put(struct gpio_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) if (desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344) gpiod_free(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) EXPORT_SYMBOL_GPL(gpiod_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349) * gpiod_put_array - dispose of multiple GPIO descriptors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) * @descs: struct gpio_descs containing an array of descriptors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) void gpiod_put_array(struct gpio_descs *descs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) for (i = 0; i < descs->ndescs; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) gpiod_put(descs->desc[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) kfree(descs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) EXPORT_SYMBOL_GPL(gpiod_put_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) static int gpio_bus_match(struct device *dev, struct device_driver *drv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) * Only match if the fwnode doesn't already have a proper struct device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) * created for it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) if (dev->fwnode && dev->fwnode->dev != dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) static int gpio_stub_drv_probe(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) * The DT node of some GPIO chips have a "compatible" property, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) * never have a struct device added and probed by a driver to register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380) * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) * the consumers of the GPIO chip to get probe deferred forever because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382) * they will be waiting for a device associated with the GPIO chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) * firmware node to get added and bound to a driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) * To allow these consumers to probe, we associate the struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386) * gpio_device of the GPIO chip with the firmware node and then simply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) * bind it to this stub driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) static struct device_driver gpio_stub_drv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) .name = "gpio_stub_drv",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394) .bus = &gpio_bus_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) .probe = gpio_stub_drv_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398) static int __init gpiolib_dev_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) /* Register GPIO sysfs bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) ret = bus_register(&gpio_bus_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405) pr_err("gpiolib: could not register GPIO bus type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) ret = driver_register(&gpio_stub_drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411) pr_err("gpiolib: could not register GPIO stub driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) bus_unregister(&gpio_bus_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416) ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) pr_err("gpiolib: failed to allocate char dev region\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) driver_unregister(&gpio_stub_drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) bus_unregister(&gpio_bus_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) gpiolib_initialized = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) gpiochip_setup_devs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429) #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) core_initcall(gpiolib_dev_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437) static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) struct gpio_chip *gc = gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) unsigned gpio = gdev->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) struct gpio_desc *gdesc = &gdev->descs[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) bool is_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) bool is_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) bool active_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) if (gdesc->name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) seq_printf(s, " gpio-%-3d (%-20.20s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) gpio, gdesc->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) gpiod_get_direction(gdesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457) is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459) active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461) gpio, gdesc->name ? gdesc->name : "", gdesc->label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) is_out ? "out" : "in ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) is_irq ? "IRQ " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) active_low ? "ACTIVE LOW" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466) seq_printf(s, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470) static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) struct gpio_device *gdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) loff_t index = *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) s->private = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) list_for_each_entry(gdev, &gpio_devices, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) if (index-- == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) return gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489) static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) struct gpio_device *gdev = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) void *ret = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495) spin_lock_irqsave(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) if (list_is_last(&gdev->list, &gpio_devices))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) ret = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) ret = list_entry(gdev->list.next, struct gpio_device, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) spin_unlock_irqrestore(&gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) s->private = "\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) ++*pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) static void gpiolib_seq_stop(struct seq_file *s, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512) static int gpiolib_seq_show(struct seq_file *s, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514) struct gpio_device *gdev = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) struct gpio_chip *gc = gdev->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) struct device *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) if (!gc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) dev_name(&gdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525) dev_name(&gdev->dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) gdev->base, gdev->base + gdev->ngpio - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) parent = gc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) if (parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529) seq_printf(s, ", parent: %s/%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) parent->bus ? parent->bus->name : "no-bus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531) dev_name(parent));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) if (gc->label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) seq_printf(s, ", %s", gc->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) if (gc->can_sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) seq_printf(s, ", can sleep");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) seq_printf(s, ":\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538) if (gc->dbg_show)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) gc->dbg_show(s, gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) gpiolib_dbg_show(s, gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) static const struct seq_operations gpiolib_sops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) .start = gpiolib_seq_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548) .next = gpiolib_seq_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) .stop = gpiolib_seq_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) .show = gpiolib_seq_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) DEFINE_SEQ_ATTRIBUTE(gpiolib);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) static int __init gpiolib_debugfs_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556) /* /sys/kernel/debug/gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557) debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) subsys_initcall(gpiolib_debugfs_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) #endif /* DEBUG_FS */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags