Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * gpiolib support for Wolfson WM831x PMICs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2009 Wolfson Microelectronics PLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mfd/wm831x/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mfd/wm831x/pdata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/mfd/wm831x/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mfd/wm831x/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct wm831x_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct wm831x *wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	int val = WM831X_GPN_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	if (wm831x->has_gpio_ena)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		val |= WM831X_GPN_TRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 			       WM831X_GPN_DIR | WM831X_GPN_TRI |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 			       WM831X_GPN_FN_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	if (ret & 1 << offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			value << offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static int wm831x_gpio_direction_out(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 				     unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	int val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (wm831x->has_gpio_ena)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		val |= WM831X_GPN_TRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			      WM831X_GPN_DIR | WM831X_GPN_TRI |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			      WM831X_GPN_FN_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/* Can only set GPIO state once it's in output mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	wm831x_gpio_set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return irq_create_mapping(wm831x->irq_domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 				  WM831X_IRQ_GPIO_1 + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int wm831x_gpio_set_debounce(struct wm831x *wm831x, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				    unsigned debounce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	int reg = WM831X_GPIO1_CONTROL + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	int ret, fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	ret = wm831x_reg_read(wm831x, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	switch (ret & WM831X_GPN_FN_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		/* Not in GPIO mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	if (debounce >= 32 && debounce <= 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		fn = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	else if (debounce >= 4000 && debounce <= 8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		fn = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int wm831x_set_config(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			     unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	int reg = WM831X_GPIO1_CONTROL + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	switch (pinconf_to_config_param(config)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return wm831x_set_bits(wm831x, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				       WM831X_GPN_OD_MASK, WM831X_GPN_OD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	case PIN_CONFIG_DRIVE_PUSH_PULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		return wm831x_set_bits(wm831x, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 				       WM831X_GPN_OD_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	case PIN_CONFIG_INPUT_DEBOUNCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		return wm831x_gpio_set_debounce(wm831x, offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			pinconf_to_config_argument(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	struct wm831x *wm831x = wm831x_gpio->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int i, tristated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	for (i = 0; i < chip->ngpio; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		int gpio = i + chip->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		const char *label, *pull, *powerdomain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		/* We report the GPIO even if it's not requested since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		 * we're also reporting things like alternate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		 * functions which apply even when the GPIO is not in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		 * use as a GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		label = gpiochip_is_requested(chip, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		if (!label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			label = "Unrequested";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		seq_printf(s, " gpio-%-3d (%-20.20s) ", gpio, label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		reg = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		if (reg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			dev_err(wm831x->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				"GPIO control %d read failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 				gpio, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			seq_putc(s, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		switch (reg & WM831X_GPN_PULL_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		case WM831X_GPIO_PULL_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			pull = "nopull";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		case WM831X_GPIO_PULL_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			pull = "pulldown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		case WM831X_GPIO_PULL_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			pull = "pullup";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			pull = "INVALID PULL";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		switch (i + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		case 1 ... 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		case 7 ... 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 			if (reg & WM831X_GPN_PWR_DOM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				powerdomain = "VPMIC";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 				powerdomain = "DBVDD";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		case 4 ... 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		case 10 ... 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			if (reg & WM831X_GPN_PWR_DOM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 				powerdomain = "SYSVDD";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 				powerdomain = "DBVDD";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		case 13 ... 16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			powerdomain = "TPVDD";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		tristated = reg & WM831X_GPN_TRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		if (wm831x->has_gpio_ena)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			tristated = !tristated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		seq_printf(s, " %s %s %s %s%s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			   "                                  %s%s (0x%4x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			   reg & WM831X_GPN_DIR ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 			   wm831x_gpio_get(chip, i) ? "high" : "low",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			   pull,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			   powerdomain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			   reg & WM831X_GPN_POL ? "" : " inverted",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			   reg & WM831X_GPN_OD ? "open-drain" : "push-pull",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			   tristated ? " tristated" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			   reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define wm831x_gpio_dbg_show NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const struct gpio_chip template_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	.label			= "wm831x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	.owner			= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.direction_input	= wm831x_gpio_direction_in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	.get			= wm831x_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.direction_output	= wm831x_gpio_direction_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	.set			= wm831x_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.to_irq			= wm831x_gpio_to_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.set_config		= wm831x_set_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.dbg_show		= wm831x_gpio_dbg_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	.can_sleep		= true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int wm831x_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	struct wm831x_pdata *pdata = &wm831x->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	struct wm831x_gpio *wm831x_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	wm831x_gpio = devm_kzalloc(&pdev->dev, sizeof(*wm831x_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 				   GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (wm831x_gpio == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	wm831x_gpio->wm831x = wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	wm831x_gpio->gpio_chip = template_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	wm831x_gpio->gpio_chip.ngpio = wm831x->num_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	wm831x_gpio->gpio_chip.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (pdata && pdata->gpio_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		wm831x_gpio->gpio_chip.base = pdata->gpio_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		wm831x_gpio->gpio_chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #ifdef CONFIG_OF_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	wm831x_gpio->gpio_chip.of_node = wm831x->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	ret = devm_gpiochip_add_data(&pdev->dev, &wm831x_gpio->gpio_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 				     wm831x_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	platform_set_drvdata(pdev, wm831x_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static struct platform_driver wm831x_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	.driver.name	= "wm831x-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	.probe		= wm831x_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static int __init wm831x_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	return platform_driver_register(&wm831x_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) subsys_initcall(wm831x_gpio_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static void __exit wm831x_gpio_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	platform_driver_unregister(&wm831x_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) module_exit(wm831x_gpio_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MODULE_DESCRIPTION("GPIO interface for WM831x PMICs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MODULE_ALIAS("platform:wm831x-gpio");