^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Access to GPIOs on TWL4030/TPS659x0 chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2006-2007 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2006 MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Code re-arranged and cleaned up by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Syed Mohammed Khasim <x0khasim@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Initial Code:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Andy Lowe / Nishanth Menon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/mfd/twl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * The GPIO "subchip" supports 18 GPIOs which can be configured as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * inputs or outputs, with pullups or pulldowns on each pin. Each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * GPIO can trigger interrupts on either or both edges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * GPIO interrupts can be fed to either of two IRQ lines; this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * intended to support multiple hosts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * There are also two LED pins used sometimes as output-only GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* genirq interfaces are not available to modules */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifdef MODULE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define is_module() true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define is_module() false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* GPIO_CTRL Fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define MASK_GPIO_CTRL_GPIO0CD1 BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MASK_GPIO_CTRL_GPIO1CD2 BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MASK_GPIO_CTRL_GPIO_ON BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Mask for GPIO registers when aggregated into a 32-bit integer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define GPIO_32_MASK 0x0003ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct gpio_twl4030_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Bitfields for state caching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned int usage_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned int direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int out_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * To configure TWL4030 GPIO module registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static inline int gpio_twl4030_write(u8 address, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return twl_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * LED register offsets from TWL_MODULE_LED base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * PWMs A and B are dedicated to LEDs A and B, respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define TWL4030_LED_LEDEN_REG 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define TWL4030_PWMAON_REG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define TWL4030_PWMAOFF_REG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define TWL4030_PWMBON_REG 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define TWL4030_PWMBOFF_REG 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* LEDEN bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define LEDEN_LEDAON BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define LEDEN_LEDBON BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define LEDEN_LEDAEXT BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define LEDEN_LEDBEXT BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define LEDEN_LEDAPWM BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define LEDEN_LEDBPWM BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define LEDEN_PWM_LENGTHA BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define LEDEN_PWM_LENGTHB BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define PWMxON_LENGTH BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * To read a TWL4030 GPIO module register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static inline int gpio_twl4030_read(u8 address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ret = twl_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return (ret < 0) ? ret : data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static u8 cached_leden;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* The LED lines are open drain outputs ... a FET pulls to GND, so an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * external pullup is needed. We could also expose the integrated PWM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * as a LED brightness control; we initialize it as "always on".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static void twl4030_led_set_value(int led, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u8 mask = LEDEN_LEDAON | LEDEN_LEDAPWM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) mask <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) cached_leden &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) cached_leden |= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) WARN_ON_ONCE(twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) TWL4030_LED_LEDEN_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int twl4030_set_gpio_direction(int gpio, int is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) u8 d_bnk = gpio >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u8 d_msk = BIT(gpio & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u8 reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u8 base = REG_GPIODATADIR1 + d_bnk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret = gpio_twl4030_read(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) reg = ret & ~d_msk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) reg = ret | d_msk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ret = gpio_twl4030_write(base, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int twl4030_get_gpio_direction(int gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u8 d_bnk = gpio >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u8 d_msk = BIT(gpio & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u8 base = REG_GPIODATADIR1 + d_bnk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = gpio_twl4030_read(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (ret & d_msk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int twl4030_set_gpio_dataout(int gpio, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u8 d_bnk = gpio >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) u8 d_msk = BIT(gpio & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u8 base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) base = REG_SETGPIODATAOUT1 + d_bnk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) base = REG_CLEARGPIODATAOUT1 + d_bnk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return gpio_twl4030_write(base, d_msk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int twl4030_get_gpio_datain(int gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u8 d_bnk = gpio >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) u8 d_off = gpio & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) u8 base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) base = REG_GPIODATAIN1 + d_bnk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ret = gpio_twl4030_read(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = (ret >> d_off) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int twl_request(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* Support the two LED outputs as output-only GPIOs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (offset >= TWL4030_GPIO_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u8 ledclr_mask = LEDEN_LEDAON | LEDEN_LEDAEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) | LEDEN_LEDAPWM | LEDEN_PWM_LENGTHA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u8 reg = TWL4030_PWMAON_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) offset -= TWL4030_GPIO_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ledclr_mask <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) reg = TWL4030_PWMBON_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* initialize PWM to always-drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* Configure PWM OFF register first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) status = twl_i2c_write_u8(TWL4030_MODULE_LED, 0x7f, reg + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* Followed by PWM ON register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) status = twl_i2c_write_u8(TWL4030_MODULE_LED, 0x7f, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* init LED to not-driven (high) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) status = twl_i2c_read_u8(TWL4030_MODULE_LED, &cached_leden,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) TWL4030_LED_LEDEN_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) cached_leden &= ~ledclr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) status = twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) TWL4030_LED_LEDEN_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* on first use, turn GPIO module "on" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (!priv->usage_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct twl4030_gpio_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u8 value = MASK_GPIO_CTRL_GPIO_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* optionally have the first two GPIOs switch vMMC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * and vMMC2 power supplies based on card presence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) pdata = dev_get_platdata(chip->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) value |= pdata->mmc_cd & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) status = gpio_twl4030_write(REG_GPIO_CTRL, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (!status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) priv->usage_count |= BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static void twl_free(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (offset >= TWL4030_GPIO_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) priv->usage_count &= ~BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* on last use, switch off GPIO module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!priv->usage_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (offset < TWL4030_GPIO_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ret = twl4030_set_gpio_direction(offset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ret = -EINVAL; /* LED outputs can't be set as input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) priv->direction &= ~BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static int twl_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (!(priv->usage_count & BIT(offset))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ret = -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (priv->direction & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) status = priv->out_state & BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) status = twl4030_get_gpio_datain(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ret = (status < 0) ? status : !!status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (offset < TWL4030_GPIO_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) twl4030_set_gpio_dataout(offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) priv->out_state |= BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) priv->out_state &= ~BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (offset < TWL4030_GPIO_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ret = twl4030_set_gpio_direction(offset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * LED gpios i.e. offset >= TWL4030_GPIO_MAX are always output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) priv->direction |= BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) twl_set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static int twl_get_direction(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) * Default GPIO_LINE_DIRECTION_OUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * LED GPIOs >= TWL4030_GPIO_MAX are always output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) int ret = GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) mutex_lock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (offset < TWL4030_GPIO_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ret = twl4030_get_gpio_direction(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) mutex_unlock(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct gpio_twl4030_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return (priv->irq_base && (offset < TWL4030_GPIO_MAX))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) ? (priv->irq_base + offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) : -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static const struct gpio_chip template_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .label = "twl4030",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .request = twl_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .free = twl_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .direction_input = twl_direction_in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .direction_output = twl_direction_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .get_direction = twl_get_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .get = twl_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .set = twl_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .to_irq = twl_to_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .can_sleep = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static int gpio_twl4030_pulls(u32 ups, u32 downs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u8 message[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) unsigned i, gpio_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /* For most pins, a pulldown was enabled by default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * We should have data that's specific to this board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) for (gpio_bit = 1, i = 0; i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) u8 bit_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) unsigned j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (ups & gpio_bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) bit_mask |= 1 << (j + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) else if (downs & gpio_bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) bit_mask |= 1 << (j + 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) message[i] = bit_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return twl_i2c_write(TWL4030_MODULE_GPIO, message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) REG_GPIOPUPDCTR1, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static int gpio_twl4030_debounce(u32 debounce, u8 mmc_cd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) u8 message[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /* 30 msec of debouncing is always used for MMC card detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * and is optional for everything else.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) message[0] = (debounce & 0xff) | (mmc_cd & 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) debounce >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) message[1] = (debounce & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) debounce >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) message[2] = (debounce & 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return twl_i2c_write(TWL4030_MODULE_GPIO, message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) REG_GPIO_DEBEN1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static int gpio_twl4030_remove(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static struct twl4030_gpio_platform_data *of_gpio_twl4030(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) struct twl4030_gpio_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct twl4030_gpio_platform_data *omap_twl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) omap_twl_info = devm_kzalloc(dev, sizeof(*omap_twl_info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (!omap_twl_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) *omap_twl_info = *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) omap_twl_info->use_leds = of_property_read_bool(dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) "ti,use-leds");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) of_property_read_u32(dev->of_node, "ti,debounce",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) &omap_twl_info->debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) of_property_read_u32(dev->of_node, "ti,mmc-cd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) (u32 *)&omap_twl_info->mmc_cd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) of_property_read_u32(dev->of_node, "ti,pullups",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) &omap_twl_info->pullups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) of_property_read_u32(dev->of_node, "ti,pulldowns",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) &omap_twl_info->pulldowns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return omap_twl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static int gpio_twl4030_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct twl4030_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct gpio_twl4030_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) int ret, irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) priv = devm_kzalloc(&pdev->dev, sizeof(struct gpio_twl4030_priv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* maybe setup IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (is_module()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_err(&pdev->dev, "can't dispatch IRQs from modules\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) goto no_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) irq_base = devm_irq_alloc_descs(&pdev->dev, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 0, TWL4030_GPIO_MAX, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (irq_base < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) dev_err(&pdev->dev, "Failed to alloc irq_descs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) irq_domain_add_legacy(node, TWL4030_GPIO_MAX, irq_base, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) &irq_domain_simple_ops, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ret = twl4030_sih_setup(&pdev->dev, TWL4030_MODULE_GPIO, irq_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) priv->irq_base = irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) no_irqs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) priv->gpio_chip = template_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) priv->gpio_chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) priv->gpio_chip.ngpio = TWL4030_GPIO_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) priv->gpio_chip.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) mutex_init(&priv->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) pdata = of_gpio_twl4030(&pdev->dev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (pdata == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) dev_err(&pdev->dev, "Platform data is missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * NOTE: boards may waste power if they don't set pullups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * and pulldowns correctly ... default for non-ULPI pins is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) * pulldown, and some other pins may have external pullups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) * or pulldowns. Careful!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ret = gpio_twl4030_pulls(pdata->pullups, pdata->pulldowns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) dev_dbg(&pdev->dev, "pullups %.05x %.05x --> %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) pdata->pullups, pdata->pulldowns, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = gpio_twl4030_debounce(pdata->debounce, pdata->mmc_cd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) dev_dbg(&pdev->dev, "debounce %.03x %.01x --> %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) pdata->debounce, pdata->mmc_cd, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * NOTE: we assume VIBRA_CTL.VIBRA_EN, in MODULE_AUDIO_VOICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * is (still) clear if use_leds is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (pdata->use_leds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) priv->gpio_chip.ngpio += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ret = gpiochip_add_data(&priv->gpio_chip, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) priv->gpio_chip.ngpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) gpio_twl4030_remove(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) platform_set_drvdata(pdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (pdata->setup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) status = pdata->setup(&pdev->dev, priv->gpio_chip.base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) TWL4030_GPIO_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) dev_dbg(&pdev->dev, "setup --> %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Cannot use as gpio_twl4030_probe() calls us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static int gpio_twl4030_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) struct twl4030_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) struct gpio_twl4030_priv *priv = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (pdata && pdata->teardown) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) status = pdata->teardown(&pdev->dev, priv->gpio_chip.base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) TWL4030_GPIO_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) dev_dbg(&pdev->dev, "teardown --> %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) gpiochip_remove(&priv->gpio_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) if (is_module())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /* REVISIT no support yet for deregistering all the IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static const struct of_device_id twl_gpio_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) { .compatible = "ti,twl4030-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) MODULE_DEVICE_TABLE(of, twl_gpio_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* Note: this hardware lives inside an I2C-based multi-function device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) MODULE_ALIAS("platform:twl4030_gpio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static struct platform_driver gpio_twl4030_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .name = "twl4030_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .of_match_table = twl_gpio_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .probe = gpio_twl4030_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) .remove = gpio_twl4030_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static int __init gpio_twl4030_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) return platform_driver_register(&gpio_twl4030_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) subsys_initcall(gpio_twl4030_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static void __exit gpio_twl4030_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) platform_driver_unregister(&gpio_twl4030_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) module_exit(gpio_twl4030_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) MODULE_AUTHOR("Texas Instruments, Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) MODULE_DESCRIPTION("GPIO interface for TWL4030");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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