^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Digital I/O driver for Technologic Systems I2C FPGA Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2015, 2018 Technologic Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Savoir-Faire Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * modify it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * kind, whether expressed or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * GNU General Public License version 2 for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DEFAULT_PIN_NUMBER 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Register bits used by the GPIO device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Some boards, such as TS-7970 do not have a separate input bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define TS4900_GPIO_OE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define TS4900_GPIO_OUT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TS4900_GPIO_IN 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define TS7970_GPIO_IN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct ts4900_gpio_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned int input_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static int ts4900_gpio_get_direction(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct ts4900_gpio_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) regmap_read(priv->regmap, offset, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (reg & TS4900_GPIO_OE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int ts4900_gpio_direction_input(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct ts4900_gpio_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Only clear the OE bit here, requires a RMW. Prevents potential issue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * with OE and data getting to the physical pin at different times.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return regmap_update_bits(priv->regmap, offset, TS4900_GPIO_OE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int ts4900_gpio_direction_output(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) unsigned int offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct ts4900_gpio_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* If changing from an input to an output, we need to first set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * proper data bit to what is requested and then set OE bit. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * prevents a glitch that can occur on the IO line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) regmap_read(priv->regmap, offset, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (!(reg & TS4900_GPIO_OE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) reg = TS4900_GPIO_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) reg &= ~TS4900_GPIO_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) regmap_write(priv->regmap, offset, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ret = regmap_write(priv->regmap, offset, TS4900_GPIO_OE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) TS4900_GPIO_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ret = regmap_write(priv->regmap, offset, TS4900_GPIO_OE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int ts4900_gpio_get(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct ts4900_gpio_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) regmap_read(priv->regmap, offset, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return !!(reg & priv->input_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void ts4900_gpio_set(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct ts4900_gpio_priv *priv = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) regmap_update_bits(priv->regmap, offset, TS4900_GPIO_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) TS4900_GPIO_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) regmap_update_bits(priv->regmap, offset, TS4900_GPIO_OUT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static const struct regmap_config ts4900_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .reg_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static const struct gpio_chip template_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .label = "ts4900-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .get_direction = ts4900_gpio_get_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .direction_input = ts4900_gpio_direction_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .direction_output = ts4900_gpio_direction_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .get = ts4900_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .set = ts4900_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .can_sleep = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const struct of_device_id ts4900_gpio_of_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .compatible = "technologic,ts4900-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .data = (void *)TS4900_GPIO_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .compatible = "technologic,ts7970-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .data = (void *)TS7970_GPIO_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MODULE_DEVICE_TABLE(of, ts4900_gpio_of_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int ts4900_gpio_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct ts4900_gpio_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u32 ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (of_property_read_u32(client->dev.of_node, "ngpios", &ngpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ngpio = DEFAULT_PIN_NUMBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) priv->gpio_chip = template_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) priv->gpio_chip.label = "ts4900-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) priv->gpio_chip.ngpio = ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) priv->gpio_chip.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) priv->input_bit = (uintptr_t)of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) priv->regmap = devm_regmap_init_i2c(client, &ts4900_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (IS_ERR(priv->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ret = PTR_ERR(priv->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) dev_err(&client->dev, "Failed to allocate register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ret = devm_gpiochip_add_data(&client->dev, &priv->gpio_chip, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev_err(&client->dev, "Unable to register gpiochip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) i2c_set_clientdata(client, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const struct i2c_device_id ts4900_gpio_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { "ts4900-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MODULE_DEVICE_TABLE(i2c, ts4900_gpio_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static struct i2c_driver ts4900_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .name = "ts4900-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .of_match_table = ts4900_gpio_of_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .probe = ts4900_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .id_table = ts4900_gpio_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) module_i2c_driver(ts4900_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MODULE_AUTHOR("Technologic Systems");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MODULE_DESCRIPTION("GPIO interface for Technologic Systems I2C-FPGA core");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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