Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * GPIO driver for the TS-4800 board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (c) 2016 - Savoir-faire Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define DEFAULT_PIN_NUMBER      16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define INPUT_REG_OFFSET        0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define OUTPUT_REG_OFFSET       0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DIRECTION_REG_OFFSET    0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int ts4800_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	struct gpio_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	void __iomem *base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	u32 ngpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	chip = devm_kzalloc(&pdev->dev, sizeof(struct gpio_chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	base_addr = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	if (IS_ERR(base_addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		return PTR_ERR(base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	retval = of_property_read_u32(node, "ngpios", &ngpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	if (retval == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		ngpios = DEFAULT_PIN_NUMBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	else if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 			    base_addr + OUTPUT_REG_OFFSET, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			    base_addr + DIRECTION_REG_OFFSET, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		dev_err(&pdev->dev, "bgpio_init failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	chip->ngpio = ngpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	platform_set_drvdata(pdev, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	return devm_gpiochip_add_data(&pdev->dev, chip, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static const struct of_device_id ts4800_gpio_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	{ .compatible = "technologic,ts4800-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MODULE_DEVICE_TABLE(of, ts4800_gpio_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct platform_driver ts4800_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		   .name = "ts4800-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		   .of_match_table = ts4800_gpio_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	.probe = ts4800_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) module_platform_driver_probe(ts4800_gpio_driver, ts4800_gpio_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MODULE_AUTHOR("Julien Grossholtz <julien.grossholtz@savoirfairelinux.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MODULE_DESCRIPTION("TS4800 FPGA GPIO driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MODULE_LICENSE("GPL v2");