^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2015 Verifone Int.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This driver is based on the gpio-tps65912 implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mfd/tps65218.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct tps65218_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct tps65218 *tps65218;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int tps65218_gpio_get(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct tps65218 *tps65218 = tps65218_gpio->tps65218;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ret = regmap_read(tps65218->regmap, TPS65218_REG_ENABLE2, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return !!(val & (TPS65218_ENABLE2_GPIO1 << offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static void tps65218_gpio_set(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct tps65218 *tps65218 = tps65218_gpio->tps65218;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) tps65218_set_bits(tps65218, TPS65218_REG_ENABLE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) TPS65218_ENABLE2_GPIO1 << offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) TPS65218_ENABLE2_GPIO1 << offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) tps65218_clear_bits(tps65218, TPS65218_REG_ENABLE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) TPS65218_ENABLE2_GPIO1 << offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static int tps65218_gpio_output(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Only drives GPOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) tps65218_gpio_set(gc, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int tps65218_gpio_input(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct tps65218 *tps65218 = tps65218_gpio->tps65218;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (gpiochip_line_is_open_source(gc, offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) dev_err(gc->parent, "can't work as open source\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) switch (offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (!gpiochip_line_is_open_drain(gc, offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) dev_err(gc->parent, "GPO1 works only as open drain\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* Disable sequencer for GPO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) TPS65218_SEQ7_GPO1_SEQ_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Setup GPO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) TPS65218_CONFIG1_IO1_SEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* Setup GPO2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) TPS65218_CONFIG1_IO1_SEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!gpiochip_line_is_open_drain(gc, offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) dev_err(gc->parent, "GPO3 works only as open drain\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Disable sequencer for GPO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) TPS65218_SEQ7_GPO3_SEQ_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Setup GPO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) TPS65218_CONFIG2_DC12_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int tps65218_gpio_set_config(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct tps65218 *tps65218 = tps65218_gpio->tps65218;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) enum pin_config_param param = pinconf_to_config_param(config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) switch (offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* GPO1 is hardwired to be open drain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* GPO2 is push-pull by default, can be set as open drain. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return tps65218_clear_bits(tps65218,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) TPS65218_REG_CONFIG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) TPS65218_CONFIG1_GPO2_BUF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (param == PIN_CONFIG_DRIVE_PUSH_PULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return tps65218_set_bits(tps65218,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) TPS65218_REG_CONFIG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) TPS65218_CONFIG1_GPO2_BUF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) TPS65218_CONFIG1_GPO2_BUF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const struct gpio_chip template_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .label = "gpio-tps65218",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .request = tps65218_gpio_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .direction_output = tps65218_gpio_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .direction_input = tps65218_gpio_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .get = tps65218_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .set = tps65218_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .set_config = tps65218_gpio_set_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .can_sleep = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .ngpio = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int tps65218_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct tps65218 *tps65218 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct tps65218_gpio *tps65218_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) tps65218_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65218_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (!tps65218_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) tps65218_gpio->tps65218 = tps65218;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) tps65218_gpio->gpio_chip = template_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) tps65218_gpio->gpio_chip.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #ifdef CONFIG_OF_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) tps65218_gpio->gpio_chip.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ret = devm_gpiochip_add_data(&pdev->dev, &tps65218_gpio->gpio_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) tps65218_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) platform_set_drvdata(pdev, tps65218_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const struct of_device_id tps65218_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) { .compatible = "ti,tps65218-gpio" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MODULE_DEVICE_TABLE(of, tps65218_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const struct platform_device_id tps65218_gpio_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) { "tps65218-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MODULE_DEVICE_TABLE(platform, tps65218_gpio_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static struct platform_driver tps65218_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .name = "tps65218-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .of_match_table = of_match_ptr(tps65218_dt_match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .probe = tps65218_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .id_table = tps65218_gpio_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) module_platform_driver(tps65218_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) MODULE_AUTHOR("Nicolas Saenz Julienne <nicolassaenzj@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MODULE_DESCRIPTION("GPO interface for TPS65218 PMICs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_ALIAS("platform:tps65218-gpio");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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