^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * sl28cpld GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2020 Michael Walle <michael@walle.cc>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* GPIO flavor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define GPIO_REG_DIR 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define GPIO_REG_OUT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define GPIO_REG_IN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GPIO_REG_IE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define GPIO_REG_IP 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* input-only flavor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define GPI_REG_IN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* output-only flavor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define GPO_REG_OUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum sl28cpld_gpio_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) SL28CPLD_GPIO = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) SL28CPLD_GPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) SL28CPLD_GPO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static const struct regmap_irq sl28cpld_gpio_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) REGMAP_IRQ_REG_LINE(0, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) REGMAP_IRQ_REG_LINE(1, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) REGMAP_IRQ_REG_LINE(2, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) REGMAP_IRQ_REG_LINE(3, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) REGMAP_IRQ_REG_LINE(4, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) REGMAP_IRQ_REG_LINE(5, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) REGMAP_IRQ_REG_LINE(6, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) REGMAP_IRQ_REG_LINE(7, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int sl28cpld_gpio_irq_init(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct gpio_regmap_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct regmap_irq_chip_data *irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct regmap_irq_chip *irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!device_property_read_bool(dev, "interrupt-controller"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (!irq_chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) irq_chip->name = "sl28cpld-gpio-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) irq_chip->irqs = sl28cpld_gpio_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) irq_chip->num_irqs = ARRAY_SIZE(sl28cpld_gpio_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) irq_chip->num_regs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) irq_chip->status_base = base + GPIO_REG_IP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) irq_chip->mask_base = base + GPIO_REG_IE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) irq_chip->mask_invert = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) irq_chip->ack_base = base + GPIO_REG_IP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ret = devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) config->regmap, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) IRQF_SHARED | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 0, irq_chip, &irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) config->irq_domain = regmap_irq_get_domain(irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int sl28cpld_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct gpio_regmap_config config = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enum sl28cpld_gpio_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u32 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (!pdev->dev.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) type = (uintptr_t)device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (!type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = device_property_read_u32(&pdev->dev, "reg", &base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) regmap = dev_get_regmap(pdev->dev.parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (!regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) config.regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) config.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) config.ngpio = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) case SL28CPLD_GPIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) config.reg_dat_base = base + GPIO_REG_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) config.reg_set_base = base + GPIO_REG_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* reg_dir_out_base might be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) config.reg_dir_out_base = GPIO_REGMAP_ADDR(base + GPIO_REG_DIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* This type supports interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret = sl28cpld_gpio_irq_init(pdev, base, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) case SL28CPLD_GPO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) config.reg_set_base = base + GPO_REG_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) case SL28CPLD_GPI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) config.reg_dat_base = base + GPI_REG_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_err(&pdev->dev, "unknown type %d\n", type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const struct of_device_id sl28cpld_gpio_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { .compatible = "kontron,sl28cpld-gpio", .data = (void *)SL28CPLD_GPIO },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { .compatible = "kontron,sl28cpld-gpi", .data = (void *)SL28CPLD_GPI },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { .compatible = "kontron,sl28cpld-gpo", .data = (void *)SL28CPLD_GPO },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MODULE_DEVICE_TABLE(of, sl28cpld_gpio_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static struct platform_driver sl28cpld_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .probe = sl28cpld_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .name = "sl28cpld-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .of_match_table = sl28cpld_gpio_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) module_platform_driver(sl28cpld_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_DESCRIPTION("sl28cpld GPIO Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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