^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_data/pcf857x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static const struct i2c_device_id pcf857x_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) { "pcf8574", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) { "pcf8574a", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) { "pca8574", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) { "pca9670", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) { "pca9672", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) { "pca9674", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) { "pcf8575", 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) { "pca8575", 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { "pca9671", 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { "pca9673", 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { "pca9675", 16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { "max7328", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) { "max7329", 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MODULE_DEVICE_TABLE(i2c, pcf857x_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static const struct of_device_id pcf857x_of_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { .compatible = "nxp,pcf8574" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { .compatible = "nxp,pcf8574a" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { .compatible = "nxp,pca8574" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { .compatible = "nxp,pca9670" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { .compatible = "nxp,pca9672" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { .compatible = "nxp,pca9674" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { .compatible = "nxp,pcf8575" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { .compatible = "nxp,pca8575" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { .compatible = "nxp,pca9671" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { .compatible = "nxp,pca9673" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { .compatible = "nxp,pca9675" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { .compatible = "maxim,max7328" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { .compatible = "maxim,max7329" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MODULE_DEVICE_TABLE(of, pcf857x_of_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * The pcf857x, pca857x, and pca967x chips only expose one read and one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * write register. Writing a "one" bit (to match the reset state) lets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * that pin be used as an input; it's not an open-drain model, but acts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * a bit like one. This is described as "quasi-bidirectional"; read the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * chip documentation for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * Many other I2C GPIO expander chips (like the pca953x models) have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * more complex register models and more conventional circuitry using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * push/pull drivers. They often use the same 0x20..0x27 addresses as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * pcf857x parts, making the "legacy" I2C driver model problematic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct pcf857x {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct irq_chip irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct mutex lock; /* protect 'out' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned out; /* software latch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned status; /* current status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned irq_enabled; /* enabled irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int (*write)(struct i2c_client *client, unsigned data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int (*read)(struct i2c_client *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Talk to 8-bit I/O expander */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int i2c_write_le8(struct i2c_client *client, unsigned data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return i2c_smbus_write_byte(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int i2c_read_le8(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return (int)i2c_smbus_read_byte(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Talk to 16-bit I/O expander */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int i2c_write_le16(struct i2c_client *client, unsigned word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u8 buf[2] = { word & 0xff, word >> 8, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) status = i2c_master_send(client, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return (status < 0) ? status : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int i2c_read_le16(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) status = i2c_master_recv(client, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct pcf857x *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) gpio->out |= (1 << offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) status = gpio->write(gpio->client, gpio->out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct pcf857x *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) value = gpio->read(gpio->client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return (value < 0) ? value : !!(value & (1 << offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct pcf857x *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned bit = 1 << offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) gpio->out |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) gpio->out &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) status = gpio->write(gpio->client, gpio->out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) pcf857x_output(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static irqreturn_t pcf857x_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct pcf857x *gpio = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned long change, i, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) status = gpio->read(gpio->client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * call the interrupt handler iff gpio is used as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * interrupt source, just to avoid bad irqs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) change = (gpio->status ^ status) & gpio->irq_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) gpio->status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) for_each_set_bit(i, &change, gpio->chip.ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * NOP functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static void noop(struct irq_data *data) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return irq_set_irq_wake(gpio->client->irq, on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static void pcf857x_irq_enable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) gpio->irq_enabled |= (1 << data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static void pcf857x_irq_disable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) gpio->irq_enabled &= ~(1 << data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static void pcf857x_irq_bus_lock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int pcf857x_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct pcf857x *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) unsigned int n_latch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (IS_ENABLED(CONFIG_OF) && np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) of_property_read_u32(np, "lines-initial-states", &n_latch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) else if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) n_latch = pdata->n_latch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) dev_dbg(&client->dev, "no platform data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* Allocate, initialize, and register this gpio_chip. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) mutex_init(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) gpio->chip.base = pdata ? pdata->gpio_base : -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) gpio->chip.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) gpio->chip.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) gpio->chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) gpio->chip.get = pcf857x_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) gpio->chip.set = pcf857x_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) gpio->chip.direction_input = pcf857x_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) gpio->chip.direction_output = pcf857x_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) gpio->chip.ngpio = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* NOTE: the OnSemi jlc1562b is also largely compatible with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * these parts, notably for output. It has a low-resolution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * DAC instead of pin change IRQs; and its inputs can be the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * result of comparators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * 9670, 9672, 9764, and 9764a use quite a variety.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * NOTE: we don't distinguish here between *4 and *4a parts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (gpio->chip.ngpio == 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) gpio->write = i2c_write_le8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) gpio->read = i2c_read_le8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) I2C_FUNC_SMBUS_BYTE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) status = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* fail if there's no chip present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) status = i2c_smbus_read_byte(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* '75/'75c addresses are 0x20..0x27, just like the '74;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * the '75c doesn't have a current source pulling high.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * 9671, 9673, and 9765 use quite a variety of addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * NOTE: we don't distinguish here between '75 and '75c parts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) } else if (gpio->chip.ngpio == 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) gpio->write = i2c_write_le16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) gpio->read = i2c_read_le16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) status = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* fail if there's no chip present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) status = i2c_read_le16(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) dev_dbg(&client->dev, "unsupported number of gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) status = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) gpio->chip.label = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) gpio->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) i2c_set_clientdata(client, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * We can't actually know whether a pin is configured (a) as output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * and driving the signal low, or (b) as input and reporting a low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * value ... without knowing the last value written since the chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * came out of reset (if any). We can't read the latched output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * In short, the only reliable solution for setting up pin direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * is to do it explicitly. The setup() method can do that, but it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * may cause transient glitching since it can't know the last value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) * written (some pins may need to be driven low).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * Using n_latch avoids that trouble. When left initialized to zero,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * our software copy of the "latch" then matches the chip's all-ones
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * reset state. Otherwise it flags pins to be driven low.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) gpio->out = ~n_latch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) gpio->status = gpio->read(gpio->client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* Enable irqchip if we have an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (client->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct gpio_irq_chip *girq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) gpio->irqchip.name = "pcf857x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) gpio->irqchip.irq_enable = pcf857x_irq_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) gpio->irqchip.irq_disable = pcf857x_irq_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) gpio->irqchip.irq_ack = noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) gpio->irqchip.irq_mask = noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) gpio->irqchip.irq_unmask = noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) status = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) NULL, pcf857x_irq, IRQF_ONESHOT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) IRQF_TRIGGER_FALLING | IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) dev_name(&client->dev), gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) girq = &gpio->chip.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) girq->chip = &gpio->irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* This will let us handle the parent IRQ in the driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) girq->parent_handler = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) girq->num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) girq->parents = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) girq->default_type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) girq->handler = handle_level_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) girq->threaded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /* Let platform code set up the GPIOs and their users.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * Now is the first time anyone could use them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (pdata && pdata->setup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) status = pdata->setup(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) gpio->chip.base, gpio->chip.ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) pdata->context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) dev_warn(&client->dev, "setup --> %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) dev_info(&client->dev, "probed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) client->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int pcf857x_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct pcf857x *gpio = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (pdata && pdata->teardown) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) status = pdata->teardown(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) gpio->chip.base, gpio->chip.ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) pdata->context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) dev_err(&client->dev, "%s --> %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) "teardown", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static void pcf857x_shutdown(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct pcf857x *gpio = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* Drive all the I/O lines high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static struct i2c_driver pcf857x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .name = "pcf857x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .of_match_table = of_match_ptr(pcf857x_of_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .probe = pcf857x_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .remove = pcf857x_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .shutdown = pcf857x_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .id_table = pcf857x_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static int __init pcf857x_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return i2c_add_driver(&pcf857x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* register after i2c postcore initcall and before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * subsys initcalls that may rely on these GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) subsys_initcall(pcf857x_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static void __exit pcf857x_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) i2c_del_driver(&pcf857x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) module_exit(pcf857x_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) MODULE_AUTHOR("David Brownell");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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