^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TI Palma series PMIC's GPIO driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Laxman Dewangan <ldewangan@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mfd/palmas.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct palmas_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct palmas *palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct palmas_device_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct palmas_gpio *pg = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct palmas *palmas = pg->palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int gpio16 = (offset/8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) offset %= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) reg = (gpio16) ? PALMAS_GPIO_DATA_DIR2 : PALMAS_GPIO_DATA_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (val & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) reg = (gpio16) ? PALMAS_GPIO_DATA_OUT2 : PALMAS_GPIO_DATA_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) reg = (gpio16) ? PALMAS_GPIO_DATA_IN2 : PALMAS_GPIO_DATA_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return !!(val & BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static void palmas_gpio_set(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct palmas_gpio *pg = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct palmas *palmas = pg->palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int gpio16 = (offset/8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) offset %= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (gpio16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) reg = (value) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PALMAS_GPIO_SET_DATA_OUT2 : PALMAS_GPIO_CLEAR_DATA_OUT2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) reg = (value) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PALMAS_GPIO_SET_DATA_OUT : PALMAS_GPIO_CLEAR_DATA_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = palmas_write(palmas, PALMAS_GPIO_BASE, reg, BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) dev_err(gc->parent, "Reg 0x%02x write failed, %d\n", reg, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int palmas_gpio_output(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct palmas_gpio *pg = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct palmas *palmas = pg->palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int gpio16 = (offset/8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) offset %= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) reg = (gpio16) ? PALMAS_GPIO_DATA_DIR2 : PALMAS_GPIO_DATA_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Set the initial value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) palmas_gpio_set(gc, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) BIT(offset), BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int palmas_gpio_input(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct palmas_gpio *pg = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct palmas *palmas = pg->palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int gpio16 = (offset/8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) offset %= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) reg = (gpio16) ? PALMAS_GPIO_DATA_DIR2 : PALMAS_GPIO_DATA_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, BIT(offset), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int palmas_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct palmas_gpio *pg = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct palmas *palmas = pg->palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return palmas_irq_get_virq(palmas, PALMAS_GPIO_0_IRQ + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const struct palmas_device_data palmas_dev_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .ngpio = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const struct palmas_device_data tps80036_dev_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .ngpio = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct of_device_id of_palmas_gpio_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { .compatible = "ti,palmas-gpio", .data = &palmas_dev_data,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { .compatible = "ti,tps65913-gpio", .data = &palmas_dev_data,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { .compatible = "ti,tps65914-gpio", .data = &palmas_dev_data,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { .compatible = "ti,tps80036-gpio", .data = &tps80036_dev_data,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int palmas_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct palmas_platform_data *palmas_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct palmas_gpio *palmas_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) const struct palmas_device_data *dev_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) dev_data = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (!dev_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_data = &palmas_dev_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) palmas_gpio = devm_kzalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) sizeof(*palmas_gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (!palmas_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) palmas_gpio->palmas = palmas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) palmas_gpio->gpio_chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) palmas_gpio->gpio_chip.label = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) palmas_gpio->gpio_chip.ngpio = dev_data->ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) palmas_gpio->gpio_chip.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) palmas_gpio->gpio_chip.direction_input = palmas_gpio_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) palmas_gpio->gpio_chip.direction_output = palmas_gpio_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) palmas_gpio->gpio_chip.to_irq = palmas_gpio_to_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) palmas_gpio->gpio_chip.set = palmas_gpio_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) palmas_gpio->gpio_chip.get = palmas_gpio_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) palmas_gpio->gpio_chip.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #ifdef CONFIG_OF_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) palmas_gpio->gpio_chip.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) palmas_pdata = dev_get_platdata(palmas->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (palmas_pdata && palmas_pdata->gpio_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) palmas_gpio->gpio_chip.base = palmas_pdata->gpio_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) palmas_gpio->gpio_chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ret = devm_gpiochip_add_data(&pdev->dev, &palmas_gpio->gpio_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) palmas_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) platform_set_drvdata(pdev, palmas_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static struct platform_driver palmas_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .driver.name = "palmas-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .driver.of_match_table = of_palmas_gpio_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .probe = palmas_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int __init palmas_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return platform_driver_register(&palmas_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) subsys_initcall(palmas_gpio_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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