^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Turris Mox Moxtet GPIO expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/moxtet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define MOXTET_GPIO_NGPIOS 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define MOXTET_GPIO_INPUTS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct moxtet_gpio_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u16 in_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u16 out_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static const struct moxtet_gpio_desc descs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) [TURRIS_MOX_MODULE_SFP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .in_mask = GENMASK(2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .out_mask = GENMASK(5, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct moxtet_gpio_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) const struct moxtet_gpio_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static int moxtet_gpio_get_value(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct moxtet_gpio_chip *chip = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (chip->desc->in_mask & BIT(offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ret = moxtet_device_read(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) } else if (chip->desc->out_mask & BIT(offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ret = moxtet_device_written(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ret <<= MOXTET_GPIO_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return !!(ret & BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static void moxtet_gpio_set_value(struct gpio_chip *gc, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct moxtet_gpio_chip *chip = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) state = moxtet_device_written(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (state < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) offset -= MOXTET_GPIO_INPUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) state |= BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) state &= ~BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) moxtet_device_write(chip->dev, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int moxtet_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct moxtet_gpio_chip *chip = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* All lines are hard wired to be either input or output, not both. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (chip->desc->in_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) else if (chip->desc->out_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int moxtet_gpio_direction_input(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct moxtet_gpio_chip *chip = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (chip->desc->in_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) else if (chip->desc->out_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int moxtet_gpio_direction_output(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int offset, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct moxtet_gpio_chip *chip = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (chip->desc->out_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) moxtet_gpio_set_value(gc, offset, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) else if (chip->desc->in_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int moxtet_gpio_probe(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct moxtet_gpio_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct device_node *nc = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) id = to_moxtet_device(dev)->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (id >= ARRAY_SIZE(descs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) dev_err(dev, "%pOF Moxtet device id 0x%x is not supported by gpio-moxtet driver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) nc, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) chip->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) chip->gpio_chip.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) chip->desc = &descs[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dev_set_drvdata(dev, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) chip->gpio_chip.label = dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) chip->gpio_chip.get_direction = moxtet_gpio_get_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) chip->gpio_chip.direction_input = moxtet_gpio_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) chip->gpio_chip.direction_output = moxtet_gpio_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) chip->gpio_chip.get = moxtet_gpio_get_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) chip->gpio_chip.set = moxtet_gpio_set_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) chip->gpio_chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) chip->gpio_chip.ngpio = MOXTET_GPIO_NGPIOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) chip->gpio_chip.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) chip->gpio_chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return devm_gpiochip_add_data(dev, &chip->gpio_chip, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const struct of_device_id moxtet_gpio_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { .compatible = "cznic,moxtet-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_DEVICE_TABLE(of, moxtet_gpio_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const enum turris_mox_module_id moxtet_gpio_module_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) TURRIS_MOX_MODULE_SFP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static struct moxtet_driver moxtet_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .name = "moxtet-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .of_match_table = moxtet_gpio_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .probe = moxtet_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .id_table = moxtet_gpio_module_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) module_moxtet_driver(moxtet_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) MODULE_AUTHOR("Marek Behun <marek.behun@nic.cz>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) MODULE_DESCRIPTION("Turris Mox Moxtet GPIO expander");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags