^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2012 John Crispin <john@phrozen.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <lantiq_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * By attaching hardware latches to the EBU it is possible to create output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * only gpios. This driver configures a special memory address, which when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * written to outputs 16 bit to the latches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LTQ_EBU_WP 0x80000000 /* write protect bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct ltq_mm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct of_mm_gpio_chip mmchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u16 shadow; /* shadow the latches state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * ltq_mm_apply() - write the shadow value to the ebu address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * @chip: Pointer to our private data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Write the shadow value to the EBU to set the gpios. We need to set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * global EBU lock to make sure that PCI/MTD don't break.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static void ltq_mm_apply(struct ltq_mm *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) spin_lock_irqsave(&ebu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) __raw_writew(chip->shadow, chip->mmchip.regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) spin_unlock_irqrestore(&ebu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * ltq_mm_set() - gpio_chip->set - set gpios.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @gc: Pointer to gpio_chip device structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @gpio: GPIO signal number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @val: Value to be written to specified signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * Set the shadow value and call ltq_mm_apply.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct ltq_mm *chip = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) chip->shadow |= (1 << offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) chip->shadow &= ~(1 << offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ltq_mm_apply(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @gc: Pointer to gpio_chip device structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @gpio: GPIO signal number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @val: Value to be written to specified signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * Same as ltq_mm_set, always returns 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ltq_mm_set(gc, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * ltq_mm_save_regs() - Set initial values of GPIO pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * @mm_gc: pointer to memory mapped GPIO chip structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct ltq_mm *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) container_of(mm_gc, struct ltq_mm, mmchip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* tell the ebu controller which memory address we will be using */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ltq_mm_apply(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int ltq_mm_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct ltq_mm *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 shadow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) platform_set_drvdata(pdev, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) chip->mmchip.gc.ngpio = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) chip->mmchip.gc.direction_output = ltq_mm_dir_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) chip->mmchip.gc.set = ltq_mm_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) chip->mmchip.save_regs = ltq_mm_save_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* store the shadow value if one was passed by the devicetree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) chip->shadow = shadow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return of_mm_gpiochip_add_data(pdev->dev.of_node, &chip->mmchip, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int ltq_mm_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct ltq_mm *chip = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) of_mm_gpiochip_remove(&chip->mmchip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const struct of_device_id ltq_mm_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { .compatible = "lantiq,gpio-mm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MODULE_DEVICE_TABLE(of, ltq_mm_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct platform_driver ltq_mm_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .probe = ltq_mm_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .remove = ltq_mm_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .name = "gpio-mm-ltq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .of_match_table = ltq_mm_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static int __init ltq_mm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return platform_driver_register(<q_mm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) subsys_initcall(ltq_mm_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static void __exit ltq_mm_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) platform_driver_unregister(<q_mm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) module_exit(ltq_mm_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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