^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/resource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* Number of pins on BlueField */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define MLXBF_GPIO_NR 54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* Pad Electrical Controls. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MLXBF_GPIO_PAD_CONTROL_FIRST_WORD 0x0700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MLXBF_GPIO_PAD_CONTROL_1_FIRST_WORD 0x0708
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MLXBF_GPIO_PAD_CONTROL_2_FIRST_WORD 0x0710
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MLXBF_GPIO_PAD_CONTROL_3_FIRST_WORD 0x0718
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MLXBF_GPIO_PIN_DIR_I 0x1040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MLXBF_GPIO_PIN_DIR_O 0x1048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MLXBF_GPIO_PIN_STATE 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MLXBF_GPIO_SCRATCHPAD 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct mlxbf_gpio_context_save_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u64 scratchpad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u64 pad_control[MLXBF_GPIO_NR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u64 pin_dir_i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u64 pin_dir_o;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Device state structure. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct mlxbf_gpio_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct gpio_chip gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Memory Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct mlxbf_gpio_context_save_regs csave_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int mlxbf_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct mlxbf_gpio_state *gs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) gs = devm_kzalloc(&pdev->dev, sizeof(*gs), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (!gs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) gs->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (IS_ERR(gs->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return PTR_ERR(gs->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) gc = &gs->gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ret = bgpio_init(gc, dev, 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) gs->base + MLXBF_GPIO_PIN_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) gs->base + MLXBF_GPIO_PIN_DIR_O,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) gs->base + MLXBF_GPIO_PIN_DIR_I,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) gc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) gc->ngpio = MLXBF_GPIO_NR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ret = devm_gpiochip_add_data(dev, &gs->gc, gs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) platform_set_drvdata(pdev, gs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) dev_info(&pdev->dev, "registered Mellanox BlueField GPIO");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static int mlxbf_gpio_suspend(struct platform_device *pdev, pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct mlxbf_gpio_state *gs = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) gs->csave_regs.scratchpad = readq(gs->base + MLXBF_GPIO_SCRATCHPAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) gs->csave_regs.pad_control[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) readq(gs->base + MLXBF_GPIO_PAD_CONTROL_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) gs->csave_regs.pad_control[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) readq(gs->base + MLXBF_GPIO_PAD_CONTROL_1_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) gs->csave_regs.pad_control[2] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) readq(gs->base + MLXBF_GPIO_PAD_CONTROL_2_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) gs->csave_regs.pad_control[3] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) readq(gs->base + MLXBF_GPIO_PAD_CONTROL_3_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) gs->csave_regs.pin_dir_i = readq(gs->base + MLXBF_GPIO_PIN_DIR_I);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) gs->csave_regs.pin_dir_o = readq(gs->base + MLXBF_GPIO_PIN_DIR_O);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int mlxbf_gpio_resume(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct mlxbf_gpio_state *gs = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) writeq(gs->csave_regs.scratchpad, gs->base + MLXBF_GPIO_SCRATCHPAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) writeq(gs->csave_regs.pad_control[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) gs->base + MLXBF_GPIO_PAD_CONTROL_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) writeq(gs->csave_regs.pad_control[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) gs->base + MLXBF_GPIO_PAD_CONTROL_1_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) writeq(gs->csave_regs.pad_control[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) gs->base + MLXBF_GPIO_PAD_CONTROL_2_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) writeq(gs->csave_regs.pad_control[3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) gs->base + MLXBF_GPIO_PAD_CONTROL_3_FIRST_WORD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) writeq(gs->csave_regs.pin_dir_i, gs->base + MLXBF_GPIO_PIN_DIR_I);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) writeq(gs->csave_regs.pin_dir_o, gs->base + MLXBF_GPIO_PIN_DIR_O);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const struct acpi_device_id __maybe_unused mlxbf_gpio_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { "MLNXBF02", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MODULE_DEVICE_TABLE(acpi, mlxbf_gpio_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static struct platform_driver mlxbf_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .name = "mlxbf_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .acpi_match_table = ACPI_PTR(mlxbf_gpio_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .probe = mlxbf_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .suspend = mlxbf_gpio_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .resume = mlxbf_gpio_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) module_platform_driver(mlxbf_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MODULE_DESCRIPTION("Mellanox BlueField GPIO Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MODULE_AUTHOR("Mellanox Technologies");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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