Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright 2009-2012 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Wu Guoxing <b39297@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define GPIO_GROUP_NUM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define GPIO_NUM_PER_GROUP 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define GPIO_NUM (GPIO_GROUP_NUM*GPIO_NUM_PER_GROUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) struct mc9s08dz60 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	*reg = 0x20 + offset / GPIO_NUM_PER_GROUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	*bit = offset % GPIO_NUM_PER_GROUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static int mc9s08dz60_get_value(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	u8 reg, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	s32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct mc9s08dz60 *mc9s = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	mc9s_gpio_to_reg_and_bit(offset, &reg, &bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	value = i2c_smbus_read_byte_data(mc9s->client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	return (value >= 0) ? (value >> bit) & 0x1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static int mc9s08dz60_set(struct mc9s08dz60 *mc9s, unsigned offset, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u8 reg, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	s32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	mc9s_gpio_to_reg_and_bit(offset, &reg, &bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	value = i2c_smbus_read_byte_data(mc9s->client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	if (value >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			value |= 1 << bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			value &= ~(1 << bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		return i2c_smbus_write_byte_data(mc9s->client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct mc9s08dz60 *mc9s = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	mc9s08dz60_set(mc9s, offset, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static int mc9s08dz60_direction_output(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 				       unsigned offset, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct mc9s08dz60 *mc9s = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	return mc9s08dz60_set(mc9s, offset, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static int mc9s08dz60_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			    const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct mc9s08dz60 *mc9s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	mc9s = devm_kzalloc(&client->dev, sizeof(*mc9s), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (!mc9s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	mc9s->chip.label = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	mc9s->chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	mc9s->chip.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	mc9s->chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	mc9s->chip.ngpio = GPIO_NUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	mc9s->chip.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	mc9s->chip.get = mc9s08dz60_get_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	mc9s->chip.set = mc9s08dz60_set_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	mc9s->chip.direction_output = mc9s08dz60_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	mc9s->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	i2c_set_clientdata(client, mc9s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return devm_gpiochip_add_data(&client->dev, &mc9s->chip, mc9s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const struct i2c_device_id mc9s08dz60_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	{"mc9s08dz60", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct i2c_driver mc9s08dz60_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		.name = "mc9s08dz60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.probe = mc9s08dz60_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.id_table = mc9s08dz60_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) builtin_i2c_driver(mc9s08dz60_i2c_driver);