Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2006 Juergen Beisert, Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2009 Wolfram Sang, Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * The Maxim MAX7300/1 device is an I2C/SPI driven GPIO expander. There are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Note:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * - DIN must be stable at the rising edge of clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * - when writing:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *   - always clock in 16 clocks at once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *   - at DIN: D15 first, D0 last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *   - D0..D7 = databyte, D8..D14 = commandbyte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *   - D15 = low -> write command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * - when reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *   - always clock in 16 clocks at once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  *   - at DIN: D15 first, D0 last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *   - D0..D7 = dummy, D8..D14 = register address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  *   - D15 = high -> read command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *   - raise CS and assert it again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  *   - always clock in 16 clocks at once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  *   - at DOUT: D15 first, D0 last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  *   - D0..D7 contains the data from the first cycle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * The driver exports a standard gpiochip interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/spi/max7301.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * Pin configurations, see MAX7301 datasheet page 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define PIN_CONFIG_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define PIN_CONFIG_IN_PULLUP 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define PIN_CONFIG_IN_WO_PULLUP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define PIN_CONFIG_OUT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define PIN_NUMBER 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct max7301 *ts = container_of(chip, struct max7301, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u8 *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 offset_bits, pin_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* First 4 pins are unused in the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	offset += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	offset_bits = (offset & 3) << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	config = &ts->port_config[offset >> 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if (ts->input_pullup_active & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		pin_config = PIN_CONFIG_IN_PULLUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		pin_config = PIN_CONFIG_IN_WO_PULLUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	mutex_lock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	*config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			   | (pin_config << offset_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	mutex_unlock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		ts->out_level |= 1 << offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		return ts->write(ts->dev, 0x20 + offset, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		ts->out_level &= ~(1 << offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return ts->write(ts->dev, 0x20 + offset, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 				    int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	struct max7301 *ts = container_of(chip, struct max7301, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	u8 *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	u8 offset_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	/* First 4 pins are unused in the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	offset += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	offset_bits = (offset & 3) << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	config = &ts->port_config[offset >> 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	mutex_lock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	*config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			   | (PIN_CONFIG_OUT << offset_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ret = __max7301_set(ts, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	mutex_unlock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int max7301_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct max7301 *ts = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	int config, level = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	/* First 4 pins are unused in the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	offset += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	mutex_lock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	config = (ts->port_config[offset >> 2] >> ((offset & 3) << 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			& PIN_CONFIG_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	switch (config) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	case PIN_CONFIG_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		/* Output: return cached level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		level =  !!(ts->out_level & (1 << offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	case PIN_CONFIG_IN_WO_PULLUP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	case PIN_CONFIG_IN_PULLUP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		/* Input: read out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		level = ts->read(ts->dev, 0x20 + offset) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	mutex_unlock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	return level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	struct max7301 *ts = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	/* First 4 pins are unused in the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	offset += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	mutex_lock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	__max7301_set(ts, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	mutex_unlock(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int __max730x_probe(struct max7301 *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct device *dev = ts->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	struct max7301_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	mutex_init(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	dev_set_drvdata(dev, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	/* Power up the chip and disable IRQ output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	ts->write(dev, 0x04, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	if (pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		ts->input_pullup_active = pdata->input_pullup_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		ts->chip.base = pdata->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		ts->chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	ts->chip.label = dev->driver->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	ts->chip.direction_input = max7301_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	ts->chip.get = max7301_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	ts->chip.direction_output = max7301_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	ts->chip.set = max7301_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	ts->chip.ngpio = PIN_NUMBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	ts->chip.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	ts->chip.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	ts->chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	 * initialize pullups according to platform data and cache the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	 * register values for later use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	for (i = 1; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		 * initialize port_config with "0xAA", which means
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		 * input with internal pullup disabled. This is needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		 * to avoid writing zeros (in the inner for loop),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		 * which is not allowed according to the datasheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		ts->port_config[i] = 0xAA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		for (j = 0; j < 4; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			int offset = (i - 1) * 4 + j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			ret = max7301_direction_input(&ts->chip, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 				goto exit_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	ret = gpiochip_add_data(&ts->chip, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) exit_destroy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	mutex_destroy(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) EXPORT_SYMBOL_GPL(__max730x_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) int __max730x_remove(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct max7301 *ts = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (ts == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	/* Power down the chip and disable IRQ output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	ts->write(dev, 0x04, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	gpiochip_remove(&ts->chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	mutex_destroy(&ts->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) EXPORT_SYMBOL_GPL(__max730x_remove);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) MODULE_AUTHOR("Juergen Beisert, Wolfram Sang");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MODULE_DESCRIPTION("MAX730x GPIO-Expanders, generic parts");