^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TI/National Semiconductor LP3943 GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2013 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Milo Kim <milo.kim@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/lp3943.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum lp3943_gpios {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) LP3943_GPIO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) LP3943_GPIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) LP3943_GPIO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) LP3943_GPIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) LP3943_GPIO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) LP3943_GPIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) LP3943_GPIO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) LP3943_GPIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) LP3943_GPIO9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) LP3943_GPIO10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) LP3943_GPIO11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) LP3943_GPIO12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) LP3943_GPIO13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) LP3943_GPIO14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) LP3943_GPIO15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) LP3943_GPIO16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) LP3943_MAX_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct lp3943_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct lp3943 *lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u16 input_mask; /* 1 = GPIO is input direction, 0 = output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct lp3943 *lp3943 = lp3943_gpio->lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Return an error if the pin is already assigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (test_and_set_bit(offset, &lp3943->pin_used))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static void lp3943_gpio_free(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct lp3943 *lp3943 = lp3943_gpio->lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) clear_bit(offset, &lp3943->pin_used);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int lp3943_gpio_set_mode(struct lp3943_gpio *lp3943_gpio, u8 offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct lp3943 *lp3943 = lp3943_gpio->lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return lp3943_update_bits(lp3943, mux[offset].reg, mux[offset].mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) val << mux[offset].shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int lp3943_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) lp3943_gpio->input_mask |= BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return lp3943_gpio_set_mode(lp3943_gpio, offset, LP3943_GPIO_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int lp3943_get_gpio_in_status(struct lp3943_gpio *lp3943_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 addr, read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) switch (offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) case LP3943_GPIO1 ... LP3943_GPIO8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) addr = LP3943_REG_GPIO_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) case LP3943_GPIO9 ... LP3943_GPIO16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) addr = LP3943_REG_GPIO_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) offset = offset - 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) err = lp3943_read_byte(lp3943_gpio->lp3943, addr, &read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return !!(read & BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int lp3943_get_gpio_out_status(struct lp3943_gpio *lp3943_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct lp3943 *lp3943 = lp3943_gpio->lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) err = lp3943_read_byte(lp3943, mux[offset].reg, &read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) read = (read & mux[offset].mask) >> mux[offset].shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (read == LP3943_GPIO_OUT_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) else if (read == LP3943_GPIO_OUT_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int lp3943_gpio_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * Limitation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * LP3943 doesn't have the GPIO direction register. It provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * only input and output status registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * So, direction info is required to handle the 'get' operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * This variable is updated whenever the direction is changed and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * it is used here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (lp3943_gpio->input_mask & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return lp3943_get_gpio_in_status(lp3943_gpio, chip, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return lp3943_get_gpio_out_status(lp3943_gpio, chip, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void lp3943_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) data = LP3943_GPIO_OUT_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) data = LP3943_GPIO_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) lp3943_gpio_set_mode(lp3943_gpio, offset, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int lp3943_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) lp3943_gpio_set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) lp3943_gpio->input_mask &= ~BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct gpio_chip lp3943_gpio_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .label = "lp3943",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .request = lp3943_gpio_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .free = lp3943_gpio_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .direction_input = lp3943_gpio_direction_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .get = lp3943_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .direction_output = lp3943_gpio_direction_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .set = lp3943_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .ngpio = LP3943_MAX_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .can_sleep = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int lp3943_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct lp3943_gpio *lp3943_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) lp3943_gpio = devm_kzalloc(&pdev->dev, sizeof(*lp3943_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!lp3943_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) lp3943_gpio->lp3943 = lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) lp3943_gpio->chip = lp3943_gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) lp3943_gpio->chip.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) platform_set_drvdata(pdev, lp3943_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return devm_gpiochip_add_data(&pdev->dev, &lp3943_gpio->chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) lp3943_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const struct of_device_id lp3943_gpio_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { .compatible = "ti,lp3943-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) MODULE_DEVICE_TABLE(of, lp3943_gpio_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static struct platform_driver lp3943_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .probe = lp3943_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .name = "lp3943-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .of_match_table = lp3943_gpio_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) module_platform_driver(lp3943_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MODULE_DESCRIPTION("LP3943 GPIO driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) MODULE_ALIAS("platform:lp3943-gpio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MODULE_AUTHOR("Milo Kim");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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