^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Loongson-2F/3A/3B GPIO Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2013 Hongbing Hu <huhb@lemote.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 2014 Huacai Chen <chenhc@lemote.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <loongson.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define STLS2F_N_GPIO 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define STLS3A_N_GPIO 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #ifdef CONFIG_CPU_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LOONGSON_N_GPIO STLS3A_N_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LOONGSON_N_GPIO STLS2F_N_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Offset into the register where we read lines, we write them from offset 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * This offset is the only thing that stand between us and using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * GPIO_GENERIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LOONGSON_GPIO_IN_OFFSET 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static DEFINE_SPINLOCK(gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int loongson_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) spin_lock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) val = LOONGSON_GPIODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) spin_unlock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return !!(val & BIT(gpio + LOONGSON_GPIO_IN_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static void loongson_gpio_set_value(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned gpio, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) spin_lock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) val = LOONGSON_GPIODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) val |= BIT(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) val &= ~BIT(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) LOONGSON_GPIODATA = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) spin_unlock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) spin_lock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) temp = LOONGSON_GPIOIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) temp |= BIT(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) LOONGSON_GPIOIE = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) spin_unlock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int loongson_gpio_direction_output(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned gpio, int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) loongson_gpio_set_value(chip, gpio, level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) spin_lock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) temp = LOONGSON_GPIOIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) temp &= ~BIT(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) LOONGSON_GPIOIE = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) spin_unlock(&gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int loongson_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (!gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) gc->label = "loongson-gpio-chip";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) gc->base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) gc->ngpio = LOONGSON_N_GPIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) gc->get = loongson_gpio_get_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) gc->set = loongson_gpio_set_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) gc->direction_input = loongson_gpio_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) gc->direction_output = loongson_gpio_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return gpiochip_add_data(gc, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct platform_driver loongson_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .name = "loongson-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .probe = loongson_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int __init loongson_gpio_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = platform_driver_register(&loongson_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) pr_err("error registering loongson GPIO driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) pdev = platform_device_register_simple("loongson-gpio", -1, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return PTR_ERR_OR_ZERO(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) postcore_initcall(loongson_gpio_setup);