^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2019 Bootlin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define LOGICVC_CTRL_REG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define LOGICVC_CTRL_GPIO_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define LOGICVC_CTRL_GPIO_BITS 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LOGICVC_POWER_CTRL_REG 0x78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define LOGICVC_POWER_CTRL_GPIO_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LOGICVC_POWER_CTRL_GPIO_BITS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct logicvc_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void logicvc_gpio_offset(struct logicvc_gpio *logicvc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int *reg, unsigned int *bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (offset >= LOGICVC_CTRL_GPIO_BITS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *reg = LOGICVC_POWER_CTRL_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* To the (virtual) power ctrl offset. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) offset -= LOGICVC_CTRL_GPIO_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* To the actual bit offset in reg. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) offset += LOGICVC_POWER_CTRL_GPIO_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *reg = LOGICVC_CTRL_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* To the actual bit offset in reg. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) offset += LOGICVC_CTRL_GPIO_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *bit = BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int logicvc_gpio_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct logicvc_gpio *logicvc = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned int reg, bit, value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) logicvc_gpio_offset(logicvc, offset, ®, &bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ret = regmap_read(logicvc->regmap, reg, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return !!(value & bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static void logicvc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct logicvc_gpio *logicvc = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int reg, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) logicvc_gpio_offset(logicvc, offset, ®, &bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) regmap_update_bits(logicvc->regmap, reg, bit, value ? bit : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int logicvc_gpio_direction_output(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* Pins are always configured as output, so just set the value. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) logicvc_gpio_set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static struct regmap_config logicvc_gpio_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .reg_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .val_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .reg_stride = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .name = "logicvc-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static int logicvc_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct device_node *of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct logicvc_gpio *logicvc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) logicvc = devm_kzalloc(dev, sizeof(*logicvc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (!logicvc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Try to get regmap from parent first. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) logicvc->regmap = syscon_node_to_regmap(of_node->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Grab our own regmap if that fails. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (IS_ERR(logicvc->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = of_address_to_resource(of_node, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) dev_err(dev, "Failed to get resource from address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) base = devm_ioremap_resource(dev, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (IS_ERR(base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) dev_err(dev, "Failed to map I/O base\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return PTR_ERR(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) logicvc_gpio_regmap_config.max_register = resource_size(&res) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) logicvc_gpio_regmap_config.reg_stride;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) logicvc->regmap =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) devm_regmap_init_mmio(dev, base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) &logicvc_gpio_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (IS_ERR(logicvc->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dev_err(dev, "Failed to create regmap for I/O\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return PTR_ERR(logicvc->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) logicvc->chip.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) logicvc->chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) logicvc->chip.label = dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) logicvc->chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) logicvc->chip.ngpio = LOGICVC_CTRL_GPIO_BITS +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) LOGICVC_POWER_CTRL_GPIO_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) logicvc->chip.get = logicvc_gpio_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) logicvc->chip.set = logicvc_gpio_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) logicvc->chip.direction_output = logicvc_gpio_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) platform_set_drvdata(pdev, logicvc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return devm_gpiochip_add_data(dev, &logicvc->chip, logicvc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static const struct of_device_id logicivc_gpio_of_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .compatible = "xylon,logicvc-3.02.a-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MODULE_DEVICE_TABLE(of, logicivc_gpio_of_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static struct platform_driver logicvc_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .name = "gpio-logicvc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .of_match_table = logicivc_gpio_of_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .probe = logicvc_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) module_platform_driver(logicvc_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MODULE_AUTHOR("Paul Kocialkowski <paul.kocialkowski@bootlin.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MODULE_DESCRIPTION("Xylon LogiCVC GPIO driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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