^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Kontron PLD GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2010-2013 Kontron Europe GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Michael Brunner <michael.brunner@kontron.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mfd/kempld.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define KEMPLD_GPIO_MAX_NUM 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define KEMPLD_GPIO_MASK(x) (BIT((x) % 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define KEMPLD_GPIO_DIR_NUM(x) (0x40 + (x) / 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define KEMPLD_GPIO_LVL_NUM(x) (0x42 + (x) / 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define KEMPLD_GPIO_EVT_LVL_EDGE 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define KEMPLD_GPIO_IEN 0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct kempld_gpio_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct kempld_device_data *pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Set or clear GPIO bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * kempld_get_mutex must be called prior to calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static void kempld_gpio_bitop(struct kempld_device_data *pld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u8 reg, u8 bit, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) status = kempld_read8(pld, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) status |= KEMPLD_GPIO_MASK(bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) status &= ~KEMPLD_GPIO_MASK(bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) kempld_write8(pld, reg, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int kempld_gpio_get_bit(struct kempld_device_data *pld, u8 reg, u8 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) status = kempld_read8(pld, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return !!(status & KEMPLD_GPIO_MASK(bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct kempld_device_data *pld = gpio->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return !!kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct kempld_device_data *pld = gpio->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct kempld_device_data *pld = gpio->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct kempld_device_data *pld = gpio->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct kempld_device_data *pld = gpio->pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset), offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int kempld_gpio_pincount(struct kempld_device_data *pld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u16 evt, evt_back;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) kempld_get_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Backup event register as it might be already initialized */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) evt_back = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Clear event register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Read back event register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) evt = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Restore event register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, evt_back);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) kempld_release_mutex(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return evt ? __ffs(evt) : 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int kempld_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct kempld_device_data *pld = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct kempld_gpio_data *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct gpio_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (pld->info.spec_major < 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) "Driver only supports GPIO devices compatible to PLD spec. rev. 2.0 or higher\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) gpio->pld = pld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) platform_set_drvdata(pdev, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) chip = &gpio->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) chip->label = "gpio-kempld";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) chip->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) chip->parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) chip->can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (pdata && pdata->gpio_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) chip->base = pdata->gpio_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) chip->base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) chip->direction_input = kempld_gpio_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) chip->direction_output = kempld_gpio_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) chip->get_direction = kempld_gpio_get_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) chip->get = kempld_gpio_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) chip->set = kempld_gpio_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) chip->ngpio = kempld_gpio_pincount(pld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (chip->ngpio == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) dev_err(dev, "No GPIO pins detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ret = devm_gpiochip_add_data(dev, chip, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev_err(dev, "Could not register GPIO chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) dev_info(dev, "GPIO functionality initialized with %d pins\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) chip->ngpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static struct platform_driver kempld_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .name = "kempld-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .probe = kempld_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) module_platform_driver(kempld_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MODULE_DESCRIPTION("KEM PLD GPIO Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MODULE_AUTHOR("Michael Brunner <michael.brunner@kontron.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MODULE_ALIAS("platform:kempld-gpio");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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