Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Driver for GE FPGA based GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Author: Martyn Welch <martyn.welch@ge.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * This file is licensed under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * version 2.  This program is licensed "as is" without any warranty of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) /* TODO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * Configuration of output modes (totem-pole/open-drain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * Interrupt configuration - interrupts are always generated the FPGA relies on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * the I/O interrupt controllers mask to stop them propergating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define GEF_GPIO_DIRECT		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define GEF_GPIO_IN		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define GEF_GPIO_OUT		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define GEF_GPIO_TRIG		0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define GEF_GPIO_POLAR_A	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define GEF_GPIO_POLAR_B	0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define GEF_GPIO_INT_STAT	0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define GEF_GPIO_OVERRUN	0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define GEF_GPIO_MODE		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static const struct of_device_id gef_gpio_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		.compatible	= "gef,sbc610-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		.data		= (void *)19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.compatible	= "gef,sbc310-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		.data		= (void *)6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		.compatible	= "ge,imp3a-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		.data		= (void *)16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) MODULE_DEVICE_TABLE(of, gef_gpio_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static int __init gef_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	void __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (!gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	regs = of_iomap(pdev->dev.of_node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	if (!regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			 regs + GEF_GPIO_OUT, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			 regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		dev_err(&pdev->dev, "bgpio_init failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		goto err0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	/* Setup pointers to chip functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	gc->label = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOF", pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (!gc->label) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		goto err0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	gc->base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	gc->ngpio = (u16)(uintptr_t)of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	gc->of_gpio_n_cells = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	gc->of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* This function adds a memory mapped GPIO chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	ret = devm_gpiochip_add_data(&pdev->dev, gc, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		goto err0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) err0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	iounmap(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	pr_err("%pOF: GPIO chip registration failed\n", pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static struct platform_driver gef_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		.name		= "gef-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.of_match_table	= gef_gpio_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) module_platform_driver_probe(gef_gpio_driver, gef_gpio_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MODULE_LICENSE("GPL");