^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * ROHM BD9571MWV-M GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * modify it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * kind, whether expressed or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * GNU General Public License version 2 for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Based on the TPS65086 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * NOTE: Interrupts are not supported yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/mfd/bd9571mwv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct bd9571mwv_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct bd9571mwv *bd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int bd9571mwv_gpio_get_direction(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int ret, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ret = regmap_read(gpio->bd->regmap, BD9571MWV_GPIO_DIR, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (val & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int bd9571mwv_gpio_direction_input(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_DIR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) BIT(offset), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int bd9571mwv_gpio_direction_output(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned int offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Set the initial value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) BIT(offset), value ? BIT(offset) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_DIR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) BIT(offset), BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int bd9571mwv_gpio_get(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int ret, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = regmap_read(gpio->bd->regmap, BD9571MWV_GPIO_IN, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return val & BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void bd9571mwv_gpio_set(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) BIT(offset), value ? BIT(offset) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static const struct gpio_chip template_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .label = "bd9571mwv-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .get_direction = bd9571mwv_gpio_get_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .direction_input = bd9571mwv_gpio_direction_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .direction_output = bd9571mwv_gpio_direction_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .get = bd9571mwv_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .set = bd9571mwv_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .ngpio = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .can_sleep = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int bd9571mwv_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct bd9571mwv_gpio *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) platform_set_drvdata(pdev, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) gpio->bd = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) gpio->chip = template_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) gpio->chip.parent = gpio->bd->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const struct platform_device_id bd9571mwv_gpio_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { "bd9571mwv-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MODULE_DEVICE_TABLE(platform, bd9571mwv_gpio_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct platform_driver bd9571mwv_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .name = "bd9571mwv-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .probe = bd9571mwv_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .id_table = bd9571mwv_gpio_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) module_platform_driver(bd9571mwv_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MODULE_DESCRIPTION("BD9571MWV GPIO driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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