^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright (C) 2018 ROHM Semiconductors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // gpio-bd70528.c ROHM BD70528MWV gpio driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/mfd/rohm-bd70528.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define GPIO_IN_REG(offset) (BD70528_REG_GPIO1_IN + (offset) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define GPIO_OUT_REG(offset) (BD70528_REG_GPIO1_OUT + (offset) * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct bd70528_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct rohm_regmap_dev chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct gpio_chip gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int bd70528_set_debounce(struct bd70528_gpio *bdgpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned int offset, unsigned int debounce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) switch (debounce) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) val = BD70528_DEBOUNCE_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) case 1 ... 15000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) val = BD70528_DEBOUNCE_15MS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) case 15001 ... 30000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) val = BD70528_DEBOUNCE_30MS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) case 30001 ... 50000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) val = BD70528_DEBOUNCE_50MS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) dev_err(bdgpio->chip.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) "Invalid debounce value %u\n", debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) BD70528_DEBOUNCE_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int bd70528_get_direction(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int val, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Do we need to do something to IRQs here? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) dev_err(bdgpio->chip.dev, "Could not read gpio direction\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (val & BD70528_GPIO_OUT_EN_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int bd70528_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) switch (pinconf_to_config_param(config)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case PIN_CONFIG_DRIVE_OPEN_DRAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return regmap_update_bits(bdgpio->chip.regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) GPIO_OUT_REG(offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) BD70528_GPIO_DRIVE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) BD70528_GPIO_OPEN_DRAIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) case PIN_CONFIG_DRIVE_PUSH_PULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return regmap_update_bits(bdgpio->chip.regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) GPIO_OUT_REG(offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) BD70528_GPIO_DRIVE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) BD70528_GPIO_PUSH_PULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case PIN_CONFIG_INPUT_DEBOUNCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return bd70528_set_debounce(bdgpio, offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pinconf_to_config_argument(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static int bd70528_direction_input(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Do we need to do something to IRQs here? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) BD70528_GPIO_OUT_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) BD70528_GPIO_OUT_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void bd70528_gpio_set(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u8 val = (value) ? BD70528_GPIO_OUT_HI : BD70528_GPIO_OUT_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ret = regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BD70528_GPIO_OUT_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dev_err(bdgpio->chip.dev, "Could not set gpio to %d\n", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int bd70528_direction_output(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) bd70528_gpio_set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) BD70528_GPIO_OUT_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) BD70528_GPIO_OUT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define GPIO_IN_STATE_MASK(offset) (BD70528_GPIO_IN_STATE_BASE << (offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int bd70528_gpio_get_o(struct bd70528_gpio *bdgpio, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ret = !!(val & BD70528_GPIO_OUT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_err(bdgpio->chip.dev, "GPIO (out) state read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ret = regmap_read(bdgpio->chip.regmap, BD70528_REG_GPIO_STATE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ret = !(val & GPIO_IN_STATE_MASK(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dev_err(bdgpio->chip.dev, "GPIO (in) state read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * There is a race condition where someone might be changing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * GPIO direction after we get it but before we read the value. But
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * application design where GPIO direction may be changed just when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * we read GPIO value would be pointless as reader could not know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * whether the returned high/low state is caused by input or output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * Or then there must be other ways to mitigate the issue. Thus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * locking would make no sense.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ret = bd70528_get_direction(chip, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (ret == GPIO_LINE_DIRECTION_OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ret = bd70528_gpio_get_o(bdgpio, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) else if (ret == GPIO_LINE_DIRECTION_IN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ret = bd70528_gpio_get_i(bdgpio, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) dev_err(bdgpio->chip.dev, "failed to read GPIO direction\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int bd70528_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct bd70528_gpio *bdgpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct rohm_regmap_dev *bd70528;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) bd70528 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (!bd70528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dev_err(&pdev->dev, "No MFD driver data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) bdgpio = devm_kzalloc(&pdev->dev, sizeof(*bdgpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!bdgpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) bdgpio->chip.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) bdgpio->gpio.parent = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) bdgpio->gpio.label = "bd70528-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) bdgpio->gpio.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) bdgpio->gpio.get_direction = bd70528_get_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) bdgpio->gpio.direction_input = bd70528_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) bdgpio->gpio.direction_output = bd70528_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) bdgpio->gpio.set_config = bd70528_gpio_set_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) bdgpio->gpio.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) bdgpio->gpio.get = bd70528_gpio_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) bdgpio->gpio.set = bd70528_gpio_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) bdgpio->gpio.ngpio = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) bdgpio->gpio.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #ifdef CONFIG_OF_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) bdgpio->gpio.of_node = pdev->dev.parent->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) bdgpio->chip.regmap = bd70528->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret = devm_gpiochip_add_data(&pdev->dev, &bdgpio->gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) bdgpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) dev_err(&pdev->dev, "gpio_init: Failed to add bd70528-gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static struct platform_driver bd70528_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .name = "bd70528-gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .probe = bd70528_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) module_platform_driver(bd70528_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) MODULE_DESCRIPTION("BD70528 voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) MODULE_ALIAS("platform:bd70528-gpio");