^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for aw9110 I2C GPIO expanders
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define REG_INPUT_P0 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define REG_INPUT_P1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define REG_OUTPUT_P0 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_OUTPUT_P1 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_CONFIG_P0 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG_CONFIG_P1 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define REG_INT_P0 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define REG_INT_P1 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define REG_ID 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define REG_CTRL 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define REG_WORK_MODE_P0 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define REG_WORK_MODE_P1 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define REG_EN_BREATH 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define REG_FADE_TIME 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define REG_FULL_TIME 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define REG_DLY0_BREATH 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define REG_DLY1_BREATH 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define REG_DLY2_BREATH 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define REG_DLY3_BREATH 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define REG_DLY4_BREATH 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define REG_DLY5_BREATH 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define REG_DIM00 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define REG_DIM01 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define REG_DIM02 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define REG_DIM03 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define REG_DIM04 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define REG_DIM05 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define REG_DIM06 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define REG_DIM07 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define REG_DIM08 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define REG_DIM09 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define REG_SWRST 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define REG_81H 0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct i2c_device_id aw9110_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { "aw9110", 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MODULE_DEVICE_TABLE(i2c, aw9110_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const struct of_device_id aw9110_of_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { .compatible = "awinic,aw9110" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MODULE_DEVICE_TABLE(of, aw9110_of_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct aw9110 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct gpio_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct irq_chip irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct mutex lock; /* protect 'out' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int out; /* software latch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int direct; /* gpio direct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int status; /* current status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int irq_enabled; /* enabled irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int shdn_en; /* shutdown ctrl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int (*write)(struct i2c_client *client, u8 reg, u8 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int (*read)(struct i2c_client *client, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int aw9110_i2c_write_le8(struct i2c_client *client, u8 reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return i2c_smbus_write_byte_data(client, reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static int aw9110_i2c_read_le8(struct i2c_client *client, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return (int)i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static int aw9110_get(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct aw9110 *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (offset < 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) value = gpio->read(gpio->client, REG_INPUT_P1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) value = (value < 0) ? value : !!(value & (1 << offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) value = gpio->read(gpio->client, REG_INPUT_P0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) value = (value < 0) ? value : !!((value<<4) & (1 << offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int aw9110_get_direction(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct aw9110 *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) unsigned int reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) reg_val = gpio->direct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_dbg(gpio->dev, "direct get: %04X, pin:%d\n", reg_val, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (reg_val & (1<<offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int aw9110_direction_input(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct aw9110 *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* set direct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) gpio->direct |= (1<<offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (offset < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) gpio->write(gpio->client, REG_CONFIG_P1, gpio->direct&0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) gpio->write(gpio->client, REG_CONFIG_P0, (gpio->direct >> 4)&0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dev_dbg(gpio->dev, "direct in: %04X, pin:%d\n", gpio->direct, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int aw9110_direction_output(struct gpio_chip *chip, unsigned int offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct aw9110 *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* set level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) chip->set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* set direct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) gpio->direct &= ~(1<<offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (offset < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) gpio->write(gpio->client, REG_CONFIG_P1, gpio->direct&0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) gpio->write(gpio->client, REG_CONFIG_P0, (gpio->direct >> 4)&0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev_dbg(gpio->dev, "direct out: %04X, pin:%d\n", gpio->direct, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void aw9110_set(struct gpio_chip *chip, unsigned int offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct aw9110 *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned int bit = 1 << offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) gpio->out |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) gpio->out &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (offset < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) gpio->write(gpio->client, REG_OUTPUT_P1, gpio->out >> 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) gpio->write(gpio->client, REG_OUTPUT_P0, gpio->out >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static irqreturn_t aw9110_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct aw9110 *gpio = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) unsigned long change, i, status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) int nirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) value = gpio->read(gpio->client, REG_INPUT_P1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) status |= (value < 0) ? 0 : value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) value = gpio->read(gpio->client, REG_INPUT_P0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) status |= (value < 0) ? 0 : (value<<4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * call the interrupt handler iff gpio is used as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * interrupt source, just to avoid bad irqs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) change = (gpio->status ^ status) & gpio->irq_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) gpio->status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) for_each_set_bit(i, &change, gpio->chip.ngpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) nirq = irq_find_mapping(gpio->chip.irq.domain, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (nirq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) dev_dbg(gpio->dev, "status:%04lx,change:%04lx,index:%ld,nirq:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) status, change, i, nirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) handle_nested_irq(nirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * NOP functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void aw9110_noop(struct irq_data *data) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int aw9110_irq_set_wake(struct irq_data *data, unsigned int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct aw9110 *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return irq_set_irq_wake(gpio->client->irq, on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static void aw9110_irq_enable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct aw9110 *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) gpio->irq_enabled |= (1 << data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static void aw9110_irq_disable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct aw9110 *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) gpio->irq_enabled &= ~(1 << data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static void aw9110_irq_bus_lock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct aw9110 *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) mutex_lock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static void aw9110_irq_bus_sync_unlock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct aw9110 *gpio = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mutex_unlock(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static void aw9110_state_init(struct aw9110 *gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* out4-9 push-pull */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) gpio->write(gpio->client, REG_CTRL, (1<<4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* work mode : gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) gpio->write(gpio->client, REG_WORK_MODE_P1, 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) gpio->write(gpio->client, REG_WORK_MODE_P0, 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* default direct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) gpio->direct = 0x03FF; /* 0: output, 1:input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) gpio->write(gpio->client, REG_CONFIG_P1, gpio->direct & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) gpio->write(gpio->client, REG_CONFIG_P0, (gpio->direct>>4) & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) gpio->irq_enabled = 0x03FF; /* 0: disable 1:enable, chip: 0:enable, 1: disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) gpio->write(gpio->client, REG_INT_P1, ((~gpio->irq_enabled) >> 0)&0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) gpio->write(gpio->client, REG_INT_P0, ((~gpio->irq_enabled) >> 4)&0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* clear interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) gpio->read(gpio->client, REG_INPUT_P1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) gpio->read(gpio->client, REG_INPUT_P1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int aw9110_parse_dt(struct aw9110 *chip, struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* shdn_en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ret = of_get_named_gpio(np, "shdn_en", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dev_err(chip->dev, "of get shdn_en failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) chip->shdn_en = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) chip->shdn_en = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ret = devm_gpio_request_one(chip->dev, chip->shdn_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) GPIOF_OUT_INIT_LOW, "AW9110_SHDN_EN");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) dev_err(chip->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) "devm_gpio_request_one shdn_en failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* enable chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) gpio_set_value(chip->shdn_en, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static int aw9110_check_dev_id(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) ret = aw9110_i2c_read_le8(client, REG_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) dev_err(&client->dev, "fail to read dev id(%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) dev_info(&client->dev, "dev id : 0x%02x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static int aw9110_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct aw9110 *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dev_info(&client->dev, "===aw9110 probe===\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* Allocate, initialize, and register this gpio_chip. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) gpio->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) aw9110_parse_dt(gpio, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) mutex_init(&gpio->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) gpio->chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) gpio->chip.can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) gpio->chip.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) gpio->chip.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) gpio->chip.get = aw9110_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) gpio->chip.set = aw9110_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) gpio->chip.get_direction = aw9110_get_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) gpio->chip.direction_input = aw9110_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) gpio->chip.direction_output = aw9110_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) gpio->chip.ngpio = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) gpio->write = aw9110_i2c_write_le8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) gpio->read = aw9110_i2c_read_le8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) gpio->chip.label = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) gpio->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) i2c_set_clientdata(client, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) status = aw9110_check_dev_id(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) dev_err(&client->dev, "check device id fail(%d)\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) aw9110_state_init(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* Enable irqchip if we have an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (client->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct gpio_irq_chip *girq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) gpio->irqchip.name = "aw9110";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) gpio->irqchip.irq_enable = aw9110_irq_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) gpio->irqchip.irq_disable = aw9110_irq_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) gpio->irqchip.irq_ack = aw9110_noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) gpio->irqchip.irq_mask = aw9110_noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) gpio->irqchip.irq_unmask = aw9110_noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) gpio->irqchip.irq_set_wake = aw9110_irq_set_wake;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) gpio->irqchip.irq_bus_lock = aw9110_irq_bus_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) gpio->irqchip.irq_bus_sync_unlock = aw9110_irq_bus_sync_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) status = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) NULL, aw9110_irq, IRQF_ONESHOT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) IRQF_TRIGGER_FALLING | IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) dev_name(&client->dev), gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) girq = &gpio->chip.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) girq->chip = &gpio->irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) /* This will let us handle the parent IRQ in the driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) girq->parent_handler = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) girq->num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) girq->parents = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) girq->default_type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) girq->handler = handle_level_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) girq->threaded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) dev_info(&client->dev, "probed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) dev_err(&client->dev, "probe error %d for '%s'\n", status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) client->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static int aw9110_pm_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct aw9110 *gpio = dev->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* out4-9 push-pull */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) gpio->write(gpio->client, REG_CTRL, (1<<4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* work mode : gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) gpio->write(gpio->client, REG_WORK_MODE_P1, 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) gpio->write(gpio->client, REG_WORK_MODE_P0, 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) /* direct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) //gpio->direct = 0x03FF; /* 0: output, 1:input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) gpio->write(gpio->client, REG_CONFIG_P1, gpio->direct & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) gpio->write(gpio->client, REG_CONFIG_P0, (gpio->direct>>4) & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) gpio->write(gpio->client, REG_OUTPUT_P1, gpio->out >> 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) gpio->write(gpio->client, REG_OUTPUT_P0, gpio->out >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /* interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) //gpio->irq_enabled = 0x03FF; /* 0: disable 1:enable, chip: 0:enable, 1: disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) gpio->write(gpio->client, REG_INT_P1, ((~gpio->irq_enabled) >> 0)&0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) gpio->write(gpio->client, REG_INT_P0, ((~gpio->irq_enabled) >> 4)&0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static const struct dev_pm_ops aw9110_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .resume = aw9110_pm_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static struct i2c_driver aw9110_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .name = "aw9110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .pm = &aw9110_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .of_match_table = of_match_ptr(aw9110_of_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .probe = aw9110_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .id_table = aw9110_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static int __init aw9110_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return i2c_add_driver(&aw9110_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* register after i2c postcore initcall and before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * subsys initcalls that may rely on these GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) subsys_initcall(aw9110_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static void __exit aw9110_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) i2c_del_driver(&aw9110_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) module_exit(aw9110_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) MODULE_AUTHOR("Jake Wu <jake.wu@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) MODULE_DESCRIPTION("AW9110 i2c expander gpio driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags