^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AMD Promontory GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 ASMedia Technology Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: YD Tseng <yd_tseng@asmedia.com.tw>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PT_TOTAL_GPIO 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* PCI-E MMIO register offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PT_DIRECTION_REG 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PT_INPUTDATA_REG 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PT_OUTPUTDATA_REG 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PT_CLOCKRATE_REG 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PT_SYNC_REG 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct pt_gpio_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct gpio_chip gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) void __iomem *reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int pt_gpio_request(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 using_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) spin_lock_irqsave(&gc->bgpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (using_pins & BIT(offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) spin_unlock_irqrestore(&gc->bgpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) spin_unlock_irqrestore(&gc->bgpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static void pt_gpio_free(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 using_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) spin_lock_irqsave(&gc->bgpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) using_pins &= ~BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) spin_unlock_irqrestore(&gc->bgpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int pt_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct acpi_device *acpi_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) acpi_handle handle = ACPI_HANDLE(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct pt_gpio_chip *pt_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (acpi_bus_get_device(handle, &acpi_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) dev_err(dev, "PT GPIO device node not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pt_gpio = devm_kzalloc(dev, sizeof(struct pt_gpio_chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (!pt_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pt_gpio->reg_base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (IS_ERR(pt_gpio->reg_base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dev_err(dev, "Failed to map MMIO resource for PT GPIO.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return PTR_ERR(pt_gpio->reg_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ret = bgpio_init(&pt_gpio->gc, dev, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pt_gpio->reg_base + PT_INPUTDATA_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) pt_gpio->reg_base + PT_OUTPUTDATA_REG, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pt_gpio->reg_base + PT_DIRECTION_REG, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) BGPIOF_READ_OUTPUT_REG_SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) dev_err(dev, "bgpio_init failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pt_gpio->gc.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pt_gpio->gc.request = pt_gpio_request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) pt_gpio->gc.free = pt_gpio_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) pt_gpio->gc.ngpio = PT_TOTAL_GPIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #if defined(CONFIG_OF_GPIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) pt_gpio->gc.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret = gpiochip_add_data(&pt_gpio->gc, pt_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_err(dev, "Failed to register GPIO lib\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) platform_set_drvdata(pdev, pt_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* initialize register setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) writel(0, pt_gpio->reg_base + PT_SYNC_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) writel(0, pt_gpio->reg_base + PT_CLOCKRATE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) dev_dbg(dev, "PT GPIO driver loaded\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int pt_gpio_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct pt_gpio_chip *pt_gpio = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) gpiochip_remove(&pt_gpio->gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct acpi_device_id pt_gpio_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { "AMDF030", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { "AMDIF030", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_DEVICE_TABLE(acpi, pt_gpio_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static struct platform_driver pt_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .name = "pt-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .acpi_match_table = ACPI_PTR(pt_gpio_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .probe = pt_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .remove = pt_gpio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) module_platform_driver(pt_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MODULE_AUTHOR("YD Tseng <yd_tseng@asmedia.com.tw>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MODULE_DESCRIPTION("AMD Promontory GPIO Driver");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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