Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * GPIO driver for  Altera Arria10 MAX5 System Resource Chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Adapted from gpio-tps65910.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/mfd/altera-a10sr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * @gp:   : instance of the gpio_chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * @regmap: the regmap from the parent device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) struct altr_a10sr_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	struct gpio_chip gp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) static int altr_a10sr_gpio_get(struct gpio_chip *chip, unsigned int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	int ret, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	ret = regmap_read(gpio->regmap, ALTR_A10SR_PBDSW_REG, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	return !!(val & BIT(offset - ALTR_A10SR_LED_VALID_SHIFT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static void altr_a10sr_gpio_set(struct gpio_chip *chip, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 				int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	regmap_update_bits(gpio->regmap, ALTR_A10SR_LED_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 			   BIT(ALTR_A10SR_LED_VALID_SHIFT + offset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 			   value ? BIT(ALTR_A10SR_LED_VALID_SHIFT + offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 			   : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int altr_a10sr_gpio_direction_input(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 					   unsigned int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (nr < (ALTR_A10SR_IN_VALID_RANGE_LO - ALTR_A10SR_LED_VALID_SHIFT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static int altr_a10sr_gpio_direction_output(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 					    unsigned int nr, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	if (nr > (ALTR_A10SR_OUT_VALID_RANGE_HI - ALTR_A10SR_LED_VALID_SHIFT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	altr_a10sr_gpio_set(gc, nr, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static const struct gpio_chip altr_a10sr_gc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.label = "altr_a10sr_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	.get = altr_a10sr_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	.set = altr_a10sr_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.direction_input = altr_a10sr_gpio_direction_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.direction_output = altr_a10sr_gpio_direction_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.can_sleep = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.ngpio = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	.base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static int altr_a10sr_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct altr_a10sr_gpio *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	gpio->regmap = a10sr->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	gpio->gp = altr_a10sr_gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	gpio->gp.parent = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	gpio->gp.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	platform_set_drvdata(pdev, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const struct of_device_id altr_a10sr_gpio_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	{ .compatible = "altr,a10sr-gpio" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MODULE_DEVICE_TABLE(of, altr_a10sr_gpio_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static struct platform_driver altr_a10sr_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	.probe = altr_a10sr_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		.name	= "altr_a10sr_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		.of_match_table = of_match_ptr(altr_a10sr_gpio_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) module_platform_driver(altr_a10sr_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");