Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * GPIO Chip driver for Analog Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright 2009-2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/platform_data/adp5588.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define DRV_NAME	"adp5588-gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * Early pre 4.0 Silicon required to delay readout by at least 25ms,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * since the Event Counter Register updated 25ms after the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * asserted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define WA_DELAYED_READOUT_REVID(rev)	((rev) < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct adp5588_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct mutex lock;	/* protect cached dir, dat_out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	/* protect serialized access to the interrupt controller bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct mutex irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	uint8_t dat_out[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	uint8_t dir[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	uint8_t int_lvl_low[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	uint8_t int_lvl_high[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	uint8_t int_en[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	uint8_t irq_mask[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	uint8_t int_input_en[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	int ret = i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		dev_err(&client->dev, "Read Error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	int ret = i2c_smbus_write_byte_data(client, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		dev_err(&client->dev, "Write Error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct adp5588_gpio *dev = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	unsigned bank = ADP5588_BANK(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	unsigned bit = ADP5588_BIT(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (dev->dir[bank] & bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		val = dev->dat_out[bank];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	return !!(val & bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static void adp5588_gpio_set_value(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				   unsigned off, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned bank, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct adp5588_gpio *dev = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	bank = ADP5588_BANK(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	bit = ADP5588_BIT(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		dev->dat_out[bank] |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		dev->dat_out[bank] &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			   dev->dat_out[bank]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	unsigned bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	struct adp5588_gpio *dev = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	bank = ADP5588_BANK(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	dev->dir[bank] &= ~ADP5588_BIT(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int adp5588_gpio_direction_output(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 					 unsigned off, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	unsigned bank, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct adp5588_gpio *dev = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	bank = ADP5588_BANK(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	bit = ADP5588_BIT(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	dev->dir[bank] |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		dev->dat_out[bank] |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		dev->dat_out[bank] &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				 dev->dat_out[bank]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 				 dev->dir[bank]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #ifdef CONFIG_GPIO_ADP5588_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void adp5588_irq_bus_lock(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct adp5588_gpio *dev = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	mutex_lock(&dev->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)  /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)   * genirq core code can issue chip->mask/unmask from atomic context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)   * This doesn't work for slow busses where an access needs to sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)   * bus_sync_unlock() is therefore called outside the atomic context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)   * syncs the current irq mask state with the slow external controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)   * and unlocks the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct adp5588_gpio *dev = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		if (dev->int_input_en[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			dev->dir[i] &= ~dev->int_input_en[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			dev->int_input_en[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			adp5588_gpio_write(dev->client, GPIO_DIR1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 					   dev->dir[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		if (dev->int_en[i] ^ dev->irq_mask[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			dev->int_en[i] = dev->irq_mask[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			adp5588_gpio_write(dev->client, GPI_EM1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 					   dev->int_en[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	mutex_unlock(&dev->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static void adp5588_irq_mask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct adp5588_gpio *dev = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static void adp5588_irq_unmask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	struct adp5588_gpio *dev = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	struct adp5588_gpio *dev = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	uint16_t gpio = d->hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	unsigned bank, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	bank = ADP5588_BANK(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	bit = ADP5588_BIT(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	dev->int_lvl_low[bank] &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	dev->int_lvl_high[bank] &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		dev->int_lvl_high[bank] |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		dev->int_lvl_low[bank] |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	dev->int_input_en[bank] |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static struct irq_chip adp5588_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	.name			= "adp5588",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	.irq_mask		= adp5588_irq_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	.irq_unmask		= adp5588_irq_unmask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	.irq_bus_lock		= adp5588_irq_bus_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	.irq_bus_sync_unlock	= adp5588_irq_bus_sync_unlock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	.irq_set_type		= adp5588_irq_set_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static irqreturn_t adp5588_irq_handler(int irq, void *devid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	struct adp5588_gpio *dev = devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	int status = adp5588_gpio_read(dev->client, INT_STAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	if (status & ADP5588_KE_INT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		if (ev_cnt > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 				int key = adp5588_gpio_read(dev->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 							    Key_EVENTA + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 				/* GPIN events begin at 97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 				 * bit 7 indicates logic level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 				int gpio = (key & 0x7f) - 97;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 				int lvl = key & (1 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 				int bank = ADP5588_BANK(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 				int bit = ADP5588_BIT(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 				if ((lvl && dev->int_lvl_high[bank] & bit) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 				    (!lvl && dev->int_lvl_low[bank] & bit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 					handle_nested_irq(irq_find_mapping(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 					      dev->gpio_chip.irq.domain, gpio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static int adp5588_irq_init_hw(struct gpio_chip *gc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	struct adp5588_gpio *dev = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	/* Enable IRQs after registering chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	adp5588_gpio_write(dev->client, CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			   ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_KE_IEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int adp5588_irq_setup(struct adp5588_gpio *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	struct i2c_client *client = dev->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct adp5588_gpio_platform_data *pdata =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	struct gpio_irq_chip *girq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	mutex_init(&dev->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	ret = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 					NULL, adp5588_irq_handler, IRQF_ONESHOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 					| IRQF_TRIGGER_FALLING | IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 					dev_name(&client->dev), dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		dev_err(&client->dev, "failed to request irq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	/* This will be registered in the call to devm_gpiochip_add_data() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	girq = &dev->gpio_chip.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	girq->chip = &adp5588_irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	/* This will let us handle the parent IRQ in the driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	girq->parent_handler = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	girq->num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	girq->parents = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	girq->first = pdata ? pdata->irq_base : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	girq->default_type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	girq->handler = handle_simple_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	girq->init_hw = adp5588_irq_init_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	girq->threaded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static int adp5588_irq_setup(struct adp5588_gpio *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	struct i2c_client *client = dev->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	dev_warn(&client->dev, "interrupt support not compiled in\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #endif /* CONFIG_GPIO_ADP5588_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int adp5588_gpio_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	struct adp5588_gpio_platform_data *pdata =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 			dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	struct adp5588_gpio *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	int ret, i, revid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	unsigned int pullup_dis_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 					I2C_FUNC_SMBUS_BYTE_DATA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	dev->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	gc = &dev->gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	gc->direction_input = adp5588_gpio_direction_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	gc->direction_output = adp5588_gpio_direction_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	gc->get = adp5588_gpio_get_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	gc->set = adp5588_gpio_set_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	gc->can_sleep = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	gc->base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	gc->parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	if (pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		gc->base = pdata->gpio_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		gc->names = pdata->names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		pullup_dis_mask = pdata->pullup_dis_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	gc->ngpio = ADP5588_MAXGPIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	gc->label = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	gc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	mutex_init(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	ret = adp5588_gpio_read(dev->client, DEV_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	revid = ret & ADP5588_DEVICE_ID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 				(pullup_dis_mask >> (8 * i)) & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	if (client->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		if (WA_DELAYED_READOUT_REVID(revid)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			dev_warn(&client->dev, "GPIO int not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			ret = adp5588_irq_setup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (pdata && pdata->setup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 			dev_warn(&client->dev, "setup failed, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	i2c_set_clientdata(client, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static int adp5588_gpio_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	struct adp5588_gpio_platform_data *pdata =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 			dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	struct adp5588_gpio *dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	if (pdata && pdata->teardown) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		ret = pdata->teardown(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 				      dev->gpio_chip.base, dev->gpio_chip.ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 				      pdata->context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 			dev_err(&client->dev, "teardown failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	if (dev->client->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		free_irq(dev->client->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static const struct i2c_device_id adp5588_gpio_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	{DRV_NAME, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static const struct of_device_id adp5588_gpio_of_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	{ .compatible = "adi," DRV_NAME, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static struct i2c_driver adp5588_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 		.name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 		.of_match_table = of_match_ptr(adp5588_gpio_of_id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	.probe_new = adp5588_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	.remove = adp5588_gpio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	.id_table = adp5588_gpio_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) module_i2c_driver(adp5588_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) MODULE_DESCRIPTION("GPIO ADP5588 Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) MODULE_LICENSE("GPL");