^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * A FSI master controller, using a simple GPIO bit-banging interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/crc4.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/fsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irqflags.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "fsi-master.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LAST_ADDR_INVALID 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct fsi_master_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct fsi_master master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct mutex cmd_lock; /* mutex for command ordering */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct gpio_desc *gpio_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct gpio_desc *gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct gpio_desc *gpio_trans; /* Voltage translator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct gpio_desc *gpio_enable; /* FSI enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct gpio_desc *gpio_mux; /* Mux control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) bool external_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bool no_delays;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) uint32_t last_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) uint8_t t_send_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) uint8_t t_echo_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define CREATE_TRACE_POINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <trace/events/fsi_master_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct fsi_gpio_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) uint64_t msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) uint8_t bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static void clock_toggle(struct fsi_master_gpio *master, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) for (i = 0; i < count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (!master->no_delays)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ndelay(FSI_GPIO_STD_DLY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) gpiod_set_value(master->gpio_clk, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!master->no_delays)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ndelay(FSI_GPIO_STD_DLY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) gpiod_set_value(master->gpio_clk, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int sda_clock_in(struct fsi_master_gpio *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (!master->no_delays)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ndelay(FSI_GPIO_STD_DLY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) gpiod_set_value(master->gpio_clk, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* Dummy read to feed the synchronizers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) gpiod_get_value(master->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Actual data read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) in = gpiod_get_value(master->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (!master->no_delays)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ndelay(FSI_GPIO_STD_DLY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) gpiod_set_value(master->gpio_clk, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return in ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void sda_out(struct fsi_master_gpio *master, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) gpiod_set_value(master->gpio_data, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void set_sda_input(struct fsi_master_gpio *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) gpiod_direction_input(master->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) gpiod_set_value(master->gpio_trans, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void set_sda_output(struct fsi_master_gpio *master, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) gpiod_set_value(master->gpio_trans, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) gpiod_direction_output(master->gpio_data, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static void clock_zeros(struct fsi_master_gpio *master, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) trace_fsi_master_gpio_clock_zeros(master, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) set_sda_output(master, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) clock_toggle(master, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static void echo_delay(struct fsi_master_gpio *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) clock_zeros(master, master->t_echo_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) uint8_t num_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) uint8_t bit, in_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) set_sda_input(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) for (bit = 0; bit < num_bits; bit++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) in_bit = sda_clock_in(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) msg->msg <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) msg->msg |= ~in_bit & 0x1; /* Data is active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) msg->bits += num_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) trace_fsi_master_gpio_in(master, num_bits, msg->msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void serial_out(struct fsi_master_gpio *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) const struct fsi_gpio_msg *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) uint8_t bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) uint64_t msg = ~cmd->msg; /* Data is active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) uint64_t last_bit = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int next_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (!cmd->bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_warn(master->dev, "trying to output 0 bits\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) set_sda_output(master, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* Send the start bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) sda_out(master, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) clock_toggle(master, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* Send the message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) for (bit = 0; bit < cmd->bits; bit++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) next_bit = (msg & sda_mask) >> (cmd->bits - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (last_bit ^ next_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) sda_out(master, next_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) last_bit = next_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) clock_toggle(master, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) msg <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) msg->msg <<= bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) msg->msg |= data & ((1ull << bits) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) msg->bits += bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static void msg_push_crc(struct fsi_gpio_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) uint8_t crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) int top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) top = msg->bits & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* start bit, and any non-aligned top bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* aligned bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) crc = crc4(crc, msg->msg, msg->bits - top);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) msg_push_bits(msg, crc, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static bool check_same_address(struct fsi_master_gpio *master, int id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) uint32_t addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* this will also handle LAST_ADDR_INVALID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static bool check_relative_address(struct fsi_master_gpio *master, int id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) uint32_t addr, uint32_t *rel_addrp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) uint32_t last_addr = master->last_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int32_t rel_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (last_addr == LAST_ADDR_INVALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* We may be in 23-bit addressing mode, which uses the id as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * top two address bits. So, if we're referencing a different ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * use absolute addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (((last_addr >> 21) & 0x3) != id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* remove the top two bits from any 23-bit addressing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) last_addr &= (1 << 21) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* We know that the addresses are limited to 21 bits, so this won't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * overflow the signed rel_addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) rel_addr = addr - last_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (rel_addr > 255 || rel_addr < -256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *rel_addrp = (uint32_t)rel_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static void last_address_update(struct fsi_master_gpio *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) int id, bool valid, uint32_t addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (!valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) master->last_addr = LAST_ADDR_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) master->last_addr = ((id & 0x3) << 21) | (addr & ~0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * Encode an Absolute/Relative/Same Address command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static void build_ar_command(struct fsi_master_gpio *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct fsi_gpio_msg *cmd, uint8_t id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) uint32_t addr, size_t size, const void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int i, addr_bits, opcode_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) bool write = !!data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) uint8_t ds, opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) uint32_t rel_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) cmd->bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) cmd->msg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* we have 21 bits of address max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) addr &= ((1 << 21) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* cmd opcodes are variable length - SAME_AR is only two bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) opcode_bits = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (check_same_address(master, id, addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* we still address the byte offset within the word */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) addr_bits = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) opcode_bits = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) opcode = FSI_CMD_SAME_AR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) trace_fsi_master_gpio_cmd_same_addr(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) } else if (check_relative_address(master, id, addr, &rel_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* 8 bits plus sign */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) addr_bits = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) addr = rel_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) opcode = FSI_CMD_REL_AR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) trace_fsi_master_gpio_cmd_rel_addr(master, rel_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) addr_bits = 21;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) opcode = FSI_CMD_ABS_AR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) trace_fsi_master_gpio_cmd_abs_addr(master, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * The read/write size is encoded in the lower bits of the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * (as it must be naturally-aligned), and the following ds bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * size addr:1 addr:0 ds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * 1 x x 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * 2 x 0 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * 4 0 1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ds = size > 1 ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) addr &= ~(size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (size == 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) addr |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) msg_push_bits(cmd, id, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) msg_push_bits(cmd, opcode, opcode_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) msg_push_bits(cmd, write ? 0 : 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) msg_push_bits(cmd, addr, addr_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) msg_push_bits(cmd, ds, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) for (i = 0; write && i < size; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) msg_push_crc(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) cmd->bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) cmd->msg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) msg_push_bits(cmd, slave_id, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) msg_push_bits(cmd, FSI_CMD_DPOLL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) msg_push_crc(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) cmd->bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) cmd->msg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) msg_push_bits(cmd, slave_id, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) msg_push_bits(cmd, FSI_CMD_EPOLL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) msg_push_crc(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) cmd->bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) cmd->msg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) msg_push_bits(cmd, slave_id, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) msg_push_bits(cmd, FSI_CMD_TERM, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) msg_push_crc(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * Note: callers rely specifically on this returning -EAGAIN for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * a CRC error detected in the response. Use other error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * for other situations. It will be converted to something else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * higher up the stack before it reaches userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int read_one_response(struct fsi_master_gpio *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct fsi_gpio_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) uint32_t crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) uint8_t tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* wait for the start bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) for (i = 0; i < FSI_MASTER_MTOE_COUNT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) msg.bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) msg.msg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) serial_in(master, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (msg.msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (i == FSI_MASTER_MTOE_COUNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) dev_dbg(master->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) "Master time out waiting for response\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) msg.bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) msg.msg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* Read slave ID & response tag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) serial_in(master, &msg, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) tag = msg.msg & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* If we have an ACK and we're expecting data, clock the data in too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (tag == FSI_RESP_ACK && data_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) serial_in(master, &msg, data_size * 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* read CRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) serial_in(master, &msg, FSI_CRC_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* we have a whole message now; check CRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) crc = crc4(0, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) crc = crc4(crc, msg.msg, msg.bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (crc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Check if it's all 1's, that probably means the host is off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (((~msg.msg) & ((1ull << msg.bits) - 1)) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) dev_dbg(master->dev, "ERR response CRC msg: 0x%016llx (%d bits)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) msg.msg, msg.bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (msgp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) *msgp = msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (tagp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) *tagp = tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct fsi_gpio_msg cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) uint8_t tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) build_term_command(&cmd, slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) serial_out(master, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) echo_delay(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) rc = read_one_response(master, 0, NULL, &tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) dev_err(master->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) "TERM failed; lost communication with slave\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) } else if (tag != FSI_RESP_ACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) dev_err(master->dev, "TERM failed; response %d\n", tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int poll_for_response(struct fsi_master_gpio *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) uint8_t slave, uint8_t size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct fsi_gpio_msg response, cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int busy_count = 0, rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) uint8_t tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) uint8_t *data_byte = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) int crc_err_retries = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) retry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) rc = read_one_response(master, size, &response, &tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* Handle retries on CRC errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (rc == -EAGAIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* Too many retries ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (crc_err_retries++ > FSI_CRC_ERR_RETRIES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * Pass it up as a -EIO otherwise upper level will retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * the whole command which isn't what we want here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) dev_dbg(master->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) "CRC error retry %d\n", crc_err_retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) trace_fsi_master_gpio_crc_rsp_error(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) build_epoll_command(&cmd, slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) clock_zeros(master, FSI_MASTER_EPOLL_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) serial_out(master, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) echo_delay(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) goto retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) } else if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) switch (tag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) case FSI_RESP_ACK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (size && data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) uint64_t val = response.msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* clear crc & mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) val >>= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) val &= (1ull << (size * 8)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) for (i = 0; i < size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) data_byte[size-i-1] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) val >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) case FSI_RESP_BUSY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * Its necessary to clock slave before issuing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * d-poll, not indicated in the hardware protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * spec. < 20 clocks causes slave to hang, 21 ok.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (busy_count++ < FSI_MASTER_MAX_BUSY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) build_dpoll_command(&cmd, slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) serial_out(master, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) echo_delay(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) goto retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) dev_warn(master->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) "ERR slave is stuck in busy state, issuing TERM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) issue_term(master, slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) case FSI_RESP_ERRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case FSI_RESP_ERRC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) trace_fsi_master_gpio_crc_cmd_error(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) rc = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (busy_count > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) trace_fsi_master_gpio_poll_response_busy(master, busy_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * tSendDelay clocks, avoids signal reflections when switching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * from receive of response back to send of data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) clock_zeros(master, master->t_send_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static int send_request(struct fsi_master_gpio *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct fsi_gpio_msg *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (master->external_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) serial_out(master, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) echo_delay(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) int rc = -EAGAIN, retries = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) while ((retries++) < FSI_CRC_ERR_RETRIES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) rc = send_request(master, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) rc = poll_for_response(master, slave, resp_len, resp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (rc != -EAGAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) dev_warn(master->dev, "ECRC retry %d\n", retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* Pace it a bit before retry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static int fsi_master_gpio_read(struct fsi_master *_master, int link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) uint8_t id, uint32_t addr, void *val, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) struct fsi_gpio_msg cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (link != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) build_ar_command(master, &cmd, id, addr, size, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) rc = fsi_master_gpio_xfer(master, id, &cmd, size, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) last_address_update(master, id, rc == 0, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static int fsi_master_gpio_write(struct fsi_master *_master, int link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) uint8_t id, uint32_t addr, const void *val, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct fsi_gpio_msg cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (link != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) build_ar_command(master, &cmd, id, addr, size, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) last_address_update(master, id, rc == 0, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static int fsi_master_gpio_term(struct fsi_master *_master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) int link, uint8_t id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) struct fsi_gpio_msg cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (link != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) build_term_command(&cmd, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) last_address_update(master, id, false, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int fsi_master_gpio_break(struct fsi_master *_master, int link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (link != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) trace_fsi_master_gpio_break(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (master->external_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) set_sda_output(master, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) sda_out(master, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) sda_out(master, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) clock_toggle(master, FSI_BREAK_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) echo_delay(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) sda_out(master, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) clock_toggle(master, FSI_POST_BREAK_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) last_address_update(master, 0, false, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) /* Wait for logic reset to take effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) static void fsi_master_gpio_init(struct fsi_master_gpio *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) gpiod_direction_output(master->gpio_mux, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) gpiod_direction_output(master->gpio_trans, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) gpiod_direction_output(master->gpio_enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) gpiod_direction_output(master->gpio_clk, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) gpiod_direction_output(master->gpio_data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /* todo: evaluate if clocks can be reduced */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) clock_zeros(master, FSI_INIT_CLOCKS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) gpiod_direction_output(master->gpio_mux, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) gpiod_direction_output(master->gpio_trans, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) gpiod_direction_output(master->gpio_enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) gpiod_direction_input(master->gpio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) gpiod_direction_input(master->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) int rc = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (link != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (!master->external_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) gpiod_set_value(master->gpio_enable, enable ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static int fsi_master_gpio_link_config(struct fsi_master *_master, int link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) u8 t_send_delay, u8 t_echo_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (link != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) master->t_send_delay = t_send_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) master->t_echo_delay = t_echo_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static ssize_t external_mode_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) struct fsi_master_gpio *master = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return snprintf(buf, PAGE_SIZE - 1, "%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) master->external_mode ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) static ssize_t external_mode_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) struct device_attribute *attr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) struct fsi_master_gpio *master = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) bool external_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) err = kstrtoul(buf, 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) external_mode = !!val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) mutex_lock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (external_mode == master->external_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) master->external_mode = external_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (master->external_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) fsi_master_gpio_init_external(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) fsi_master_gpio_init(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) mutex_unlock(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) fsi_master_rescan(&master->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static DEVICE_ATTR(external_mode, 0664,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) external_mode_show, external_mode_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static void fsi_master_gpio_release(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) struct fsi_master_gpio *master = to_fsi_master_gpio(dev_to_fsi_master(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) of_node_put(dev_of_node(master->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) kfree(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static int fsi_master_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) struct fsi_master_gpio *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) struct gpio_desc *gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) master = kzalloc(sizeof(*master), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (!master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) master->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) master->master.dev.parent = master->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) master->master.dev.release = fsi_master_gpio_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) master->last_addr = LAST_ADDR_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) if (IS_ERR(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) dev_err(&pdev->dev, "failed to get clock gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) rc = PTR_ERR(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) master->gpio_clk = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) gpio = devm_gpiod_get(&pdev->dev, "data", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if (IS_ERR(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) dev_err(&pdev->dev, "failed to get data gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) rc = PTR_ERR(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) master->gpio_data = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) /* Optional GPIOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (IS_ERR(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) dev_err(&pdev->dev, "failed to get trans gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) rc = PTR_ERR(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) master->gpio_trans = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (IS_ERR(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) dev_err(&pdev->dev, "failed to get enable gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) rc = PTR_ERR(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) master->gpio_enable = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (IS_ERR(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) dev_err(&pdev->dev, "failed to get mux gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) rc = PTR_ERR(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) master->gpio_mux = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) * Check if GPIO block is slow enought that no extra delays
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) * are necessary. This improves performance on ast2500 by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) * an order of magnitude.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) master->no_delays = device_property_present(&pdev->dev, "no-gpio-delays");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /* Default FSI command delays */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) master->t_send_delay = FSI_SEND_DELAY_CLOCKS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) master->t_echo_delay = FSI_ECHO_DELAY_CLOCKS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) master->master.n_links = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) master->master.read = fsi_master_gpio_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) master->master.write = fsi_master_gpio_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) master->master.term = fsi_master_gpio_term;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) master->master.send_break = fsi_master_gpio_break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) master->master.link_enable = fsi_master_gpio_link_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) master->master.link_config = fsi_master_gpio_link_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) platform_set_drvdata(pdev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) mutex_init(&master->cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) fsi_master_gpio_init(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) rc = fsi_master_register(&master->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) device_remove_file(&pdev->dev, &dev_attr_external_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) put_device(&master->master.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) err_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) kfree(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) static int fsi_master_gpio_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) struct fsi_master_gpio *master = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) device_remove_file(&pdev->dev, &dev_attr_external_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) fsi_master_unregister(&master->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static const struct of_device_id fsi_master_gpio_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) { .compatible = "fsi-master-gpio" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) MODULE_DEVICE_TABLE(of, fsi_master_gpio_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) static struct platform_driver fsi_master_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .name = "fsi-master-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .of_match_table = fsi_master_gpio_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .probe = fsi_master_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) .remove = fsi_master_gpio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) module_platform_driver(fsi_master_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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