^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Xilinx Zynq MPSoC Firmware layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014-2018 Xilinx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Michal Simek <michal.simek@xilinx.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Davorin Mista <davorin.mista@aggios.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Jolly Shah <jollys@xilinx.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Rajan Vaja <rajanv@xilinx.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #ifndef __FIRMWARE_ZYNQMP_DEBUG_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define __FIRMWARE_ZYNQMP_DEBUG_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE_DEBUG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) void zynqmp_pm_api_debugfs_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) void zynqmp_pm_api_debugfs_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static inline void zynqmp_pm_api_debugfs_init(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static inline void zynqmp_pm_api_debugfs_exit(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* __FIRMWARE_ZYNQMP_DEBUG_H__ */