^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2018, NVIDIA CORPORATION.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __FIRMWARE_TEGRA_BPMP_PRIVATE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __FIRMWARE_TEGRA_BPMP_PRIVATE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <soc/tegra/bpmp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct tegra_bpmp_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) int (*init)(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) void (*deinit)(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) bool (*is_response_ready)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) bool (*is_request_ready)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int (*ack_response)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int (*ack_request)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) bool (*is_response_channel_free)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) bool (*is_request_channel_free)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int (*post_response)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) int (*post_request)(struct tegra_bpmp_channel *channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int (*ring_doorbell)(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int (*resume)(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) extern const struct tegra_bpmp_ops tegra186_bpmp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) extern const struct tegra_bpmp_ops tegra210_bpmp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #endif