Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Parse the EFI PCDP table to locate the console device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * (c) Copyright 2002, 2003, 2004 Hewlett-Packard Development Company, L.P.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *	Khalid Aziz <khalid.aziz@hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *	Alex Williamson <alex.williamson@hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *	Bjorn Helgaas <bjorn.helgaas@hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/efi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/vga.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "pcdp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) static int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) setup_serial_console(struct pcdp_uart *uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #ifdef CONFIG_SERIAL_8250_CONSOLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	int mmio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	static char options[64], *p = options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	char parity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	mmio = (uart->addr.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	p += sprintf(p, "uart8250,%s,0x%llx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		mmio ? "mmio" : "io", uart->addr.address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	if (uart->baud) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		p += sprintf(p, ",%llu", uart->baud);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		if (uart->bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 			switch (uart->parity) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 			    case 0x2: parity = 'e'; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 			    case 0x3: parity = 'o'; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			    default:  parity = 'n';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 			p += sprintf(p, "%c%d", parity, uart->bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	add_preferred_console("uart", 8250, &options[9]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	return setup_earlycon(options);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) setup_vga_console(struct pcdp_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u8 *if_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if_ptr = ((u8 *)dev + sizeof(struct pcdp_device));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	if (if_ptr[0] == PCDP_IF_PCI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		struct pcdp_if_pci if_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		/* struct copy since ifptr might not be correctly aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		memcpy(&if_pci, if_ptr, sizeof(if_pci));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		if (if_pci.trans & PCDP_PCI_TRANS_IOPORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			vga_console_iobase = if_pci.ioport_tra;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		if (if_pci.trans & PCDP_PCI_TRANS_MMIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 			vga_console_membase = if_pci.mmio_tra;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (efi_mem_type(vga_console_membase + 0xA0000) == EFI_CONVENTIONAL_MEMORY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		printk(KERN_ERR "PCDP: VGA selected, but frame buffer is not MMIO!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	conswitchp = &vga_con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	printk(KERN_INFO "PCDP: VGA console\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) extern unsigned long hcdp_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) efi_setup_pcdp_console(char *cmdline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct pcdp *pcdp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct pcdp_uart *uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct pcdp_device *dev, *end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	int i, serial = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (hcdp_phys == EFI_INVALID_TABLE_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	pcdp = early_memremap(hcdp_phys, 4096);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	printk(KERN_INFO "PCDP: v%d at 0x%lx\n", pcdp->rev, hcdp_phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (strstr(cmdline, "console=hcdp")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		if (pcdp->rev < 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			serial = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	} else if (strstr(cmdline, "console=")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		printk(KERN_INFO "Explicit \"console=\"; ignoring PCDP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (pcdp->rev < 3 && efi_uart_console_only())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		serial = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	for (i = 0, uart = pcdp->uart; i < pcdp->num_uarts; i++, uart++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		if (uart->flags & PCDP_UART_PRIMARY_CONSOLE || serial) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			if (uart->type == PCDP_CONSOLE_UART) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 				rc = setup_serial_console(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	end = (struct pcdp_device *) ((u8 *) pcdp + pcdp->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	for (dev = (struct pcdp_device *) (pcdp->uart + pcdp->num_uarts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	     dev < end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	     dev = (struct pcdp_device *) ((u8 *) dev + dev->length)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		if (dev->flags & PCDP_PRIMARY_CONSOLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			if (dev->type == PCDP_CONSOLE_VGA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				rc = setup_vga_console(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	early_memunmap(pcdp, 4096);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }