^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2016 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2017~2018 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Dong Aisheng <aisheng.dong@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * File containing client-side RPC functions for the MISC service. These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * function are ported to clients that communicate to the SC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/firmware/imx/svc/misc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct imx_sc_msg_req_misc_set_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) u32 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u16 resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) } __packed __aligned(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct imx_sc_msg_req_cpu_start {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 address_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u32 address_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u16 resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) } __packed __aligned(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct imx_sc_msg_req_misc_get_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u16 resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) } __packed __aligned(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct imx_sc_msg_resp_misc_get_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) } __packed __aligned(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * This function sets a miscellaneous control value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @param[in] ipc IPC handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @param[in] resource resource the control is associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * @param[in] ctrl control to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @param[in] val value to apply to the control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * @return Returns 0 for success and < 0 for errors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 ctrl, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct imx_sc_msg_req_misc_set_ctrl msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) hdr->svc = (uint8_t)IMX_SC_RPC_SVC_MISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) hdr->func = (uint8_t)IMX_SC_MISC_FUNC_SET_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) hdr->size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) msg.ctrl = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) msg.val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) msg.resource = resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return imx_scu_call_rpc(ipc, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) EXPORT_SYMBOL(imx_sc_misc_set_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * This function gets a miscellaneous control value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @param[in] ipc IPC handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @param[in] resource resource the control is associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @param[in] ctrl control to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @param[out] val pointer to return the control value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @return Returns 0 for success and < 0 for errors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int imx_sc_misc_get_control(struct imx_sc_ipc *ipc, u32 resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u8 ctrl, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct imx_sc_msg_req_misc_get_ctrl msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct imx_sc_msg_resp_misc_get_ctrl *resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) hdr->svc = (uint8_t)IMX_SC_RPC_SVC_MISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) hdr->func = (uint8_t)IMX_SC_MISC_FUNC_GET_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) hdr->size = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) msg.ctrl = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) msg.resource = resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ret = imx_scu_call_rpc(ipc, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) resp = (struct imx_sc_msg_resp_misc_get_ctrl *)&msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (val != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *val = resp->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) EXPORT_SYMBOL(imx_sc_misc_get_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * This function starts/stops a CPU identified by @resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * @param[in] ipc IPC handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * @param[in] resource resource the control is associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * @param[in] enable true for start, false for stop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * @param[in] phys_addr initial instruction address to be executed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @return Returns 0 for success and < 0 for errors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) bool enable, u64 phys_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct imx_sc_msg_req_cpu_start msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) hdr->svc = IMX_SC_RPC_SVC_PM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) hdr->func = IMX_SC_PM_FUNC_CPU_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) hdr->size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) msg.address_hi = phys_addr >> 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) msg.address_lo = phys_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) msg.resource = resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) msg.enable = enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return imx_scu_call_rpc(ipc, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) EXPORT_SYMBOL(imx_sc_pm_cpu_start);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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