^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2019 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Implementation of the SCU IRQ functions using MU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <dt-bindings/firmware/imx/rsrc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/firmware/imx/ipc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/firmware/imx/sci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mailbox_client.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define IMX_SC_IRQ_FUNC_ENABLE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define IMX_SC_IRQ_FUNC_STATUS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define IMX_SC_IRQ_NUM_GROUP 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static u32 mu_resource_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct imx_sc_msg_irq_get_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u16 resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) } __packed req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) } resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct imx_sc_msg_irq_enable {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u16 resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct imx_sc_ipc *imx_sc_irq_ipc_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct work_struct imx_sc_irq_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static ATOMIC_NOTIFIER_HEAD(imx_scu_irq_notifier_chain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int imx_scu_irq_register_notifier(struct notifier_block *nb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return atomic_notifier_chain_register(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) &imx_scu_irq_notifier_chain, nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) EXPORT_SYMBOL(imx_scu_irq_register_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int imx_scu_irq_unregister_notifier(struct notifier_block *nb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return atomic_notifier_chain_unregister(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) &imx_scu_irq_notifier_chain, nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) EXPORT_SYMBOL(imx_scu_irq_unregister_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int imx_scu_irq_notifier_call_chain(unsigned long status, u8 *group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return atomic_notifier_call_chain(&imx_scu_irq_notifier_chain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) status, (void *)group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static void imx_scu_irq_work_handler(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct imx_sc_msg_irq_get_status msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u32 irq_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) for (i = 0; i < IMX_SC_IRQ_NUM_GROUP; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) hdr->svc = IMX_SC_RPC_SVC_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) hdr->func = IMX_SC_IRQ_FUNC_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) hdr->size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) msg.data.req.resource = mu_resource_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) msg.data.req.group = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = imx_scu_call_rpc(imx_sc_irq_ipc_handle, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pr_err("get irq group %d status failed, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) irq_status = msg.data.resp.status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (!irq_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pm_system_wakeup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) imx_scu_irq_notifier_call_chain(irq_status, &i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int imx_scu_irq_group_enable(u8 group, u32 mask, u8 enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct imx_sc_msg_irq_enable msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (!imx_sc_irq_ipc_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) hdr->svc = IMX_SC_RPC_SVC_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) hdr->func = IMX_SC_IRQ_FUNC_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) hdr->size = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) msg.resource = mu_resource_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) msg.group = group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) msg.mask = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) msg.enable = enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = imx_scu_call_rpc(imx_sc_irq_ipc_handle, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) pr_err("enable irq failed, group %d, mask %d, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) group, mask, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) EXPORT_SYMBOL(imx_scu_irq_group_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static void imx_scu_irq_callback(struct mbox_client *c, void *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) schedule_work(&imx_sc_irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int imx_scu_enable_general_irq_channel(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct of_phandle_args spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct mbox_client *cl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct mbox_chan *ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) int ret = 0, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ret = imx_scu_get_handle(&imx_sc_irq_ipc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) cl = devm_kzalloc(dev, sizeof(*cl), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (!cl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) cl->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) cl->rx_callback = imx_scu_irq_callback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* SCU general IRQ uses general interrupt channel 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ch = mbox_request_channel_byname(cl, "gip3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (IS_ERR(ch)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ret = PTR_ERR(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_err(dev, "failed to request mbox chan gip3, ret %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) devm_kfree(dev, cl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) INIT_WORK(&imx_sc_irq_work, imx_scu_irq_work_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (!of_parse_phandle_with_args(dev->of_node, "mboxes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) "#mbox-cells", 0, &spec))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) i = of_alias_get_id(spec.np, "mu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* use mu1 as general mu irq channel if failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (i < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) i = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) mu_resource_id = IMX_SC_R_MU_0A + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) EXPORT_SYMBOL(imx_scu_enable_general_irq_channel);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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