Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) // Copyright (C) 2018, Advanced Micro Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/cper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * We don't need a "CPER_IA" prefix since these are all locally defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * This will save us a lot of line space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define VALID_LAPIC_ID			BIT_ULL(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define VALID_CPUID_INFO		BIT_ULL(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define VALID_PROC_ERR_INFO_NUM(bits)	(((bits) & GENMASK_ULL(7, 2)) >> 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define VALID_PROC_CXT_INFO_NUM(bits)	(((bits) & GENMASK_ULL(13, 8)) >> 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define INFO_ERR_STRUCT_TYPE_CACHE					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	GUID_INIT(0xA55701F5, 0xE3EF, 0x43DE, 0xAC, 0x72, 0x24, 0x9B,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 		  0x57, 0x3F, 0xAD, 0x2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define INFO_ERR_STRUCT_TYPE_TLB					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	GUID_INIT(0xFC06B535, 0x5E1F, 0x4562, 0x9F, 0x25, 0x0A, 0x3B,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 		  0x9A, 0xDB, 0x63, 0xC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define INFO_ERR_STRUCT_TYPE_BUS					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	GUID_INIT(0x1CF3F8B3, 0xC5B1, 0x49a2, 0xAA, 0x59, 0x5E, 0xEF,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 		  0x92, 0xFF, 0xA6, 0x3C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define INFO_ERR_STRUCT_TYPE_MS						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	GUID_INIT(0x48AB7F57, 0xDC34, 0x4f6c, 0xA7, 0xD3, 0xB0, 0xB5,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		  0xB0, 0xA7, 0x43, 0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define INFO_VALID_CHECK_INFO		BIT_ULL(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define INFO_VALID_TARGET_ID		BIT_ULL(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define INFO_VALID_REQUESTOR_ID		BIT_ULL(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define INFO_VALID_RESPONDER_ID		BIT_ULL(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define INFO_VALID_IP			BIT_ULL(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define CHECK_VALID_TRANS_TYPE		BIT_ULL(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define CHECK_VALID_OPERATION		BIT_ULL(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define CHECK_VALID_LEVEL		BIT_ULL(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define CHECK_VALID_PCC			BIT_ULL(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define CHECK_VALID_UNCORRECTED		BIT_ULL(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define CHECK_VALID_PRECISE_IP		BIT_ULL(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define CHECK_VALID_RESTARTABLE_IP	BIT_ULL(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define CHECK_VALID_OVERFLOW		BIT_ULL(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define CHECK_VALID_BUS_PART_TYPE	BIT_ULL(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define CHECK_VALID_BUS_TIME_OUT	BIT_ULL(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define CHECK_VALID_BUS_ADDR_SPACE	BIT_ULL(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define CHECK_VALID_BITS(check)		(((check) & GENMASK_ULL(15, 0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define CHECK_TRANS_TYPE(check)		(((check) & GENMASK_ULL(17, 16)) >> 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define CHECK_OPERATION(check)		(((check) & GENMASK_ULL(21, 18)) >> 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define CHECK_LEVEL(check)		(((check) & GENMASK_ULL(24, 22)) >> 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define CHECK_PCC			BIT_ULL(25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define CHECK_UNCORRECTED		BIT_ULL(26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define CHECK_PRECISE_IP		BIT_ULL(27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define CHECK_RESTARTABLE_IP		BIT_ULL(28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define CHECK_OVERFLOW			BIT_ULL(29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define CHECK_BUS_PART_TYPE(check)	(((check) & GENMASK_ULL(31, 30)) >> 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define CHECK_BUS_TIME_OUT		BIT_ULL(32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define CHECK_BUS_ADDR_SPACE(check)	(((check) & GENMASK_ULL(34, 33)) >> 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define CHECK_VALID_MS_ERR_TYPE		BIT_ULL(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define CHECK_VALID_MS_PCC		BIT_ULL(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define CHECK_VALID_MS_UNCORRECTED	BIT_ULL(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define CHECK_VALID_MS_PRECISE_IP	BIT_ULL(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define CHECK_VALID_MS_RESTARTABLE_IP	BIT_ULL(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define CHECK_VALID_MS_OVERFLOW		BIT_ULL(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define CHECK_MS_ERR_TYPE(check)	(((check) & GENMASK_ULL(18, 16)) >> 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define CHECK_MS_PCC			BIT_ULL(19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define CHECK_MS_UNCORRECTED		BIT_ULL(20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define CHECK_MS_PRECISE_IP		BIT_ULL(21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define CHECK_MS_RESTARTABLE_IP		BIT_ULL(22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define CHECK_MS_OVERFLOW		BIT_ULL(23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define CTX_TYPE_MSR			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define CTX_TYPE_MMREG			7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) enum err_types {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	ERR_TYPE_CACHE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	ERR_TYPE_TLB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	ERR_TYPE_BUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	ERR_TYPE_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	N_ERR_TYPES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static enum err_types cper_get_err_type(const guid_t *err_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_CACHE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return ERR_TYPE_CACHE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_TLB))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		return ERR_TYPE_TLB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_BUS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		return ERR_TYPE_BUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_MS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		return ERR_TYPE_MS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		return N_ERR_TYPES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const char * const ia_check_trans_type_strs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	"Instruction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	"Data Access",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	"Generic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const char * const ia_check_op_strs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	"generic error",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	"generic read",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	"generic write",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	"data read",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	"data write",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	"instruction fetch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	"prefetch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	"eviction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	"snoop",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const char * const ia_check_bus_part_type_strs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	"Local Processor originated request",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	"Local Processor responded to request",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	"Local Processor observed",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	"Generic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const char * const ia_check_bus_addr_space_strs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	"Memory Access",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	"Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	"I/O",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	"Other Transaction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static const char * const ia_check_ms_error_type_strs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	"No Error",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	"Unclassified",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	"Microcode ROM Parity Error",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	"External Error",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	"FRC Error",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	"Internal Unclassified",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const char * const ia_reg_ctx_strs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	"Unclassified Data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	"MSR Registers (Machine Check and other MSRs)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	"32-bit Mode Execution Context",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	"64-bit Mode Execution Context",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	"FXSAVE Context",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	"32-bit Mode Debug Registers (DR0-DR7)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	"64-bit Mode Debug Registers (DR0-DR7)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	"Memory Mapped Registers",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static inline void print_bool(char *str, const char *pfx, u64 check, u64 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	printk("%s%s: %s\n", pfx, str, (check & bit) ? "true" : "false");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void print_err_info_ms(const char *pfx, u16 validation_bits, u64 check)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (validation_bits & CHECK_VALID_MS_ERR_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		u8 err_type = CHECK_MS_ERR_TYPE(check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		printk("%sError Type: %u, %s\n", pfx, err_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		       err_type < ARRAY_SIZE(ia_check_ms_error_type_strs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		       ia_check_ms_error_type_strs[err_type] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (validation_bits & CHECK_VALID_MS_PCC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		print_bool("Processor Context Corrupt", pfx, check, CHECK_MS_PCC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (validation_bits & CHECK_VALID_MS_UNCORRECTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		print_bool("Uncorrected", pfx, check, CHECK_MS_UNCORRECTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	if (validation_bits & CHECK_VALID_MS_PRECISE_IP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		print_bool("Precise IP", pfx, check, CHECK_MS_PRECISE_IP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (validation_bits & CHECK_VALID_MS_RESTARTABLE_IP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		print_bool("Restartable IP", pfx, check, CHECK_MS_RESTARTABLE_IP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (validation_bits & CHECK_VALID_MS_OVERFLOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		print_bool("Overflow", pfx, check, CHECK_MS_OVERFLOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static void print_err_info(const char *pfx, u8 err_type, u64 check)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	u16 validation_bits = CHECK_VALID_BITS(check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	 * The MS Check structure varies a lot from the others, so use a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	 * separate function for decoding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (err_type == ERR_TYPE_MS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return print_err_info_ms(pfx, validation_bits, check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (validation_bits & CHECK_VALID_TRANS_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		u8 trans_type = CHECK_TRANS_TYPE(check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		printk("%sTransaction Type: %u, %s\n", pfx, trans_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		       trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		       ia_check_trans_type_strs[trans_type] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (validation_bits & CHECK_VALID_OPERATION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		u8 op = CHECK_OPERATION(check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		 * CACHE has more operation types than TLB or BUS, though the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		 * name and the order are the same.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		printk("%sOperation: %u, %s\n", pfx, op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		       op < max_ops ? ia_check_op_strs[op] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (validation_bits & CHECK_VALID_LEVEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (validation_bits & CHECK_VALID_PCC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		print_bool("Processor Context Corrupt", pfx, check, CHECK_PCC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (validation_bits & CHECK_VALID_UNCORRECTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		print_bool("Uncorrected", pfx, check, CHECK_UNCORRECTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	if (validation_bits & CHECK_VALID_PRECISE_IP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		print_bool("Precise IP", pfx, check, CHECK_PRECISE_IP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (validation_bits & CHECK_VALID_RESTARTABLE_IP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		print_bool("Restartable IP", pfx, check, CHECK_RESTARTABLE_IP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	if (validation_bits & CHECK_VALID_OVERFLOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		print_bool("Overflow", pfx, check, CHECK_OVERFLOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (err_type != ERR_TYPE_BUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (validation_bits & CHECK_VALID_BUS_PART_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		u8 part_type = CHECK_BUS_PART_TYPE(check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		printk("%sParticipation Type: %u, %s\n", pfx, part_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		       part_type < ARRAY_SIZE(ia_check_bus_part_type_strs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		       ia_check_bus_part_type_strs[part_type] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (validation_bits & CHECK_VALID_BUS_TIME_OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		print_bool("Time Out", pfx, check, CHECK_BUS_TIME_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (validation_bits & CHECK_VALID_BUS_ADDR_SPACE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		u8 addr_space = CHECK_BUS_ADDR_SPACE(check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		printk("%sAddress Space: %u, %s\n", pfx, addr_space,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		       addr_space < ARRAY_SIZE(ia_check_bus_addr_space_strs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		       ia_check_bus_addr_space_strs[addr_space] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	struct cper_ia_err_info *err_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	struct cper_ia_proc_ctx *ctx_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	char newpfx[64], infopfx[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	u8 err_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (proc->validation_bits & VALID_LAPIC_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		printk("%sLocal APIC_ID: 0x%llx\n", pfx, proc->lapic_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (proc->validation_bits & VALID_CPUID_INFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		printk("%sCPUID Info:\n", pfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, proc->cpuid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			       sizeof(proc->cpuid), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	err_info = (struct cper_ia_err_info *)(proc + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	for (i = 0; i < VALID_PROC_ERR_INFO_NUM(proc->validation_bits); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		printk("%sError Information Structure %d:\n", pfx, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		err_type = cper_get_err_type(&err_info->err_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		printk("%sError Structure Type: %s\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		       err_type < ARRAY_SIZE(cper_proc_error_type_strs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		       cper_proc_error_type_strs[err_type] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		if (err_type >= N_ERR_TYPES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			printk("%sError Structure Type: %pUl\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			       &err_info->err_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		if (err_info->validation_bits & INFO_VALID_CHECK_INFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			printk("%sCheck Information: 0x%016llx\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			       err_info->check_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			if (err_type < N_ERR_TYPES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 				snprintf(infopfx, sizeof(infopfx), "%s ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 					 newpfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 				print_err_info(infopfx, err_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 					       err_info->check_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		if (err_info->validation_bits & INFO_VALID_TARGET_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			printk("%sTarget Identifier: 0x%016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			       newpfx, err_info->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		if (err_info->validation_bits & INFO_VALID_REQUESTOR_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			printk("%sRequestor Identifier: 0x%016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 			       newpfx, err_info->requestor_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		if (err_info->validation_bits & INFO_VALID_RESPONDER_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 			printk("%sResponder Identifier: 0x%016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 			       newpfx, err_info->responder_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		if (err_info->validation_bits & INFO_VALID_IP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			printk("%sInstruction Pointer: 0x%016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 			       newpfx, err_info->ip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		err_info++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	ctx_info = (struct cper_ia_proc_ctx *)err_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	for (i = 0; i < VALID_PROC_CXT_INFO_NUM(proc->validation_bits); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		int size = sizeof(*ctx_info) + ctx_info->reg_arr_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		int groupsize = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		printk("%sContext Information Structure %d:\n", pfx, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		printk("%sRegister Context Type: %s\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		       ctx_info->reg_ctx_type < ARRAY_SIZE(ia_reg_ctx_strs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		       ia_reg_ctx_strs[ctx_info->reg_ctx_type] : "unknown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		printk("%sRegister Array Size: 0x%04x\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		       ctx_info->reg_arr_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		if (ctx_info->reg_ctx_type == CTX_TYPE_MSR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 			groupsize = 8; /* MSRs are 8 bytes wide. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			printk("%sMSR Address: 0x%08x\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 			       ctx_info->msr_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		if (ctx_info->reg_ctx_type == CTX_TYPE_MMREG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			printk("%sMM Register Address: 0x%016llx\n", newpfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			       ctx_info->mm_reg_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		printk("%sRegister Array:\n", newpfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, groupsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 			       (ctx_info + 1), ctx_info->reg_arr_size, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }