^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2006 Michael Buesch <m@bues.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * under the terms of the GNU General Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Free Software Foundation; either version 2 of the License, or (at your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * You should have received a copy of the GNU General Public License along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * with this program; if not, write to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/bcm47xx_nvram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/bcm47xx_sprom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/bcma/bcma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/if_ether.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/ssb/ssb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static void create_key(const char *prefix, const char *postfix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) const char *name, char *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (prefix && postfix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) snprintf(buf, len, "%s%s%s", prefix, name, postfix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) else if (prefix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) snprintf(buf, len, "%s%s", prefix, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) else if (postfix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) snprintf(buf, len, "%s%s", name, postfix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) snprintf(buf, len, "%s", name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int get_nvram_var(const char *prefix, const char *postfix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) const char *name, char *buf, int len, bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) char key[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) create_key(prefix, postfix, name, key, sizeof(key));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) err = bcm47xx_nvram_getenv(key, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (fallback && err == -ENOENT && prefix) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) create_key(NULL, postfix, name, key, sizeof(key));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) err = bcm47xx_nvram_getenv(key, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define NVRAM_READ_VAL(type) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static void nvram_read_ ## type(const char *prefix, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) const char *postfix, const char *name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) type *val, type allset, bool fallback) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) char buf[100]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int err; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) type var; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) err = get_nvram_var(prefix, postfix, name, buf, sizeof(buf), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) fallback); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (err < 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) err = kstrto ## type(strim(buf), 0, &var); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (err) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) prefix, name, postfix, buf, err); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (allset && var == allset) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *val = var; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) NVRAM_READ_VAL(u8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) NVRAM_READ_VAL(s8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) NVRAM_READ_VAL(u16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) NVRAM_READ_VAL(u32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #undef NVRAM_READ_VAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static void nvram_read_u32_2(const char *prefix, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u16 *val_lo, u16 *val_hi, bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) char buf[100];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) err = kstrtou32(strim(buf), 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) pr_warn("can not parse nvram name %s%s with value %s got %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) prefix, name, buf, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) *val_lo = (val & 0x0000FFFFU);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) *val_hi = (val & 0xFFFF0000U) >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static void nvram_read_leddc(const char *prefix, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 *leddc_on_time, u8 *leddc_off_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) char buf[100];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) err = kstrtou32(strim(buf), 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) pr_warn("can not parse nvram name %s%s with value %s got %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) prefix, name, buf, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (val == 0xffff || val == 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) *leddc_on_time = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *leddc_off_time = (val >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static void nvram_read_macaddr(const char *prefix, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u8 val[6], bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) char buf[100];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) strreplace(buf, '-', ':');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (!mac_pton(buf, val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) pr_warn("Can not parse mac address: %s\n", buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static void nvram_read_alpha2(const char *prefix, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) char val[2], bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) char buf[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (buf[0] == '0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (strlen(buf) > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pr_warn("alpha2 is too long %s\n", buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) memcpy(val, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* This is one-function-only macro, it uses local "sprom" variable! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (_revmask & BIT(sprom->revision)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) _allset, _fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * Special version of filling function that can be safely called for any SPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * revision. For every NVRAM to SPROM mapping it contains bitmask of revisions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * for which the mapping is valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * It obviously requires some hexadecimal/bitmasks knowledge, but allows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * writing cleaner code (easy revisions handling).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * Note that while SPROM revision 0 was never used, we still keep BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * reserved for it, just to keep numbering sane.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) const char *prefix, bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) const char *pre = prefix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) bool fb = fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* Broadcom extracts it for rev 8+ but it was found on 2 and 4 too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* TODO: rev 11 support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /* TODO: rev 11 support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) #undef ENTRY /* It's specififc, uses local variable, don't use it (again). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) const char *prefix, bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) char postfix[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct ssb_sprom_core_pwr_info *pwr_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) pwr_info = &sprom->core_pwr_info[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) snprintf(postfix, sizeof(postfix), "%i", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) nvram_read_u8(prefix, postfix, "maxp2ga",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) &pwr_info->maxpwr_2g, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) nvram_read_u8(prefix, postfix, "itt2ga",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) &pwr_info->itssi_2g, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) nvram_read_u8(prefix, postfix, "itt5ga",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) &pwr_info->itssi_5g, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) nvram_read_u16(prefix, postfix, "pa2gw0a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) &pwr_info->pa_2g[0], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) nvram_read_u16(prefix, postfix, "pa2gw1a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) &pwr_info->pa_2g[1], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) nvram_read_u16(prefix, postfix, "pa2gw2a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) &pwr_info->pa_2g[2], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) nvram_read_u8(prefix, postfix, "maxp5ga",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) &pwr_info->maxpwr_5g, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) nvram_read_u8(prefix, postfix, "maxp5gha",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) &pwr_info->maxpwr_5gh, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) nvram_read_u8(prefix, postfix, "maxp5gla",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) &pwr_info->maxpwr_5gl, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) nvram_read_u16(prefix, postfix, "pa5gw0a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) &pwr_info->pa_5g[0], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) nvram_read_u16(prefix, postfix, "pa5gw1a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) &pwr_info->pa_5g[1], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) nvram_read_u16(prefix, postfix, "pa5gw2a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) &pwr_info->pa_5g[2], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) nvram_read_u16(prefix, postfix, "pa5glw0a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) &pwr_info->pa_5gl[0], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) nvram_read_u16(prefix, postfix, "pa5glw1a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) &pwr_info->pa_5gl[1], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) nvram_read_u16(prefix, postfix, "pa5glw2a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) &pwr_info->pa_5gl[2], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) nvram_read_u16(prefix, postfix, "pa5ghw0a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) &pwr_info->pa_5gh[0], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) nvram_read_u16(prefix, postfix, "pa5ghw1a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) &pwr_info->pa_5gh[1], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) nvram_read_u16(prefix, postfix, "pa5ghw2a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) &pwr_info->pa_5gh[2], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) const char *prefix, bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) char postfix[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct ssb_sprom_core_pwr_info *pwr_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) pwr_info = &sprom->core_pwr_info[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) snprintf(postfix, sizeof(postfix), "%i", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) nvram_read_u16(prefix, postfix, "pa2gw3a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) &pwr_info->pa_2g[3], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) nvram_read_u16(prefix, postfix, "pa5gw3a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) &pwr_info->pa_5g[3], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) nvram_read_u16(prefix, postfix, "pa5glw3a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) &pwr_info->pa_5gl[3], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) nvram_read_u16(prefix, postfix, "pa5ghw3a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) &pwr_info->pa_5gh[3], 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static bool bcm47xx_is_valid_mac(u8 *mac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u8 *oui = mac + ETH_ALEN/2 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u8 *p = mac + ETH_ALEN - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) (*p) += num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (*p > num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) p--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) num = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) } while (p != oui);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (p == oui) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) pr_err("unable to fetch mac address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) static int mac_addr_used = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) const char *prefix, bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) bool fb = fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) nvram_read_macaddr(prefix, "et0macaddr", sprom->et0mac, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) nvram_read_macaddr(prefix, "et1macaddr", sprom->et1mac, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) nvram_read_macaddr(prefix, "et2macaddr", sprom->et2mac, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) nvram_read_u8(prefix, NULL, "et2mdcport", &sprom->et2mdcport, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) nvram_read_u8(prefix, NULL, "et2phyaddr", &sprom->et2phyaddr, 0, fb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /* The address prefix 00:90:4C is used by Broadcom in their initial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * configuration. When a mac address with the prefix 00:90:4C is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * all devices from the same series are sharing the same mac address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * To prevent mac address collisions we replace them with a mac address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * based on the base address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) u8 mac[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) nvram_read_macaddr(NULL, "et0macaddr", mac, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (bcm47xx_is_valid_mac(mac)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) ether_addr_copy(sprom->il0mac, mac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) mac_addr_used++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) &sprom->boardflags_hi, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) &sprom->boardflags2_hi, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) bool fallback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) bcm47xx_fill_sprom_ethernet(sprom, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) bcm47xx_fill_board_data(sprom, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) /* Entries requiring custom functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (sprom->revision >= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) &sprom->leddc_off_time, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) switch (sprom->revision) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) case 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) char prefix[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) switch (bus->bustype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) case SSB_BUSTYPE_SSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) bcm47xx_fill_sprom(out, NULL, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) case SSB_BUSTYPE_PCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) memset(out, 0, sizeof(struct ssb_sprom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) bus->host_pci->bus->number + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) PCI_SLOT(bus->host_pci->devfn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) bcm47xx_fill_sprom(out, prefix, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) pr_warn("Unable to fill SPROM for given bustype.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) #if IS_BUILTIN(CONFIG_BCMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * Having many NVRAM entries for PCI devices led to repeating prefixes like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * pci/1/1/ all the time and wasting flash space. So at some point Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * decided to introduce prefixes like 0: 1: 2: etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * If we find e.g. devpath0=pci/2/1 or devpath0=pci/2/1/ we should use 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * instead of pci/2/1/.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) size_t prefix_len = strlen(prefix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) size_t short_len = prefix_len - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) char nvram_var[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) char buf[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /* Passed prefix has to end with a slash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (prefix_len <= 0 || prefix[prefix_len - 1] != '/')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) if (snprintf(nvram_var, sizeof(nvram_var), "devpath%d", i) <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (!strcmp(buf, prefix) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) (short_len && strlen(buf) == short_len && !strncmp(buf, prefix, short_len))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) snprintf(prefix, prefix_size, "%d:", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) struct bcma_boardinfo *binfo = &bus->boardinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) struct bcma_device *core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) char buf[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) char *prefix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) bool fallback = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) switch (bus->hosttype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) case BCMA_HOSTTYPE_PCI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) memset(out, 0, sizeof(struct ssb_sprom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /* On BCM47XX all PCI buses share the same domain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (IS_ENABLED(CONFIG_BCM47XX))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) snprintf(buf, sizeof(buf), "pci/%u/%u/",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) bus->host_pci->bus->number + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PCI_SLOT(bus->host_pci->devfn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) snprintf(buf, sizeof(buf), "pci/%u/%u/",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) pci_domain_nr(bus->host_pci->bus) + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) bus->host_pci->bus->number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) bcm47xx_sprom_apply_prefix_alias(buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) prefix = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) case BCMA_HOSTTYPE_SOC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) memset(out, 0, sizeof(struct ssb_sprom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) core = bcma_find_core(bus, BCMA_CORE_80211);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (core) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) snprintf(buf, sizeof(buf), "sb/%u/",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) core->core_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) prefix = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) fallback = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) prefix = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) pr_warn("Unable to fill SPROM for given bustype.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) nvram_read_u16(prefix, NULL, "boardvendor", &binfo->vendor, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (!binfo->vendor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) binfo->vendor = SSB_BOARDVENDOR_BCM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) nvram_read_u16(prefix, NULL, "boardtype", &binfo->type, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) bcm47xx_fill_sprom(out, prefix, fallback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static unsigned int bcm47xx_sprom_registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) * On bcm47xx we need to register SPROM fallback handler very early, so we can't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) * use anything like platform device / driver for this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) int bcm47xx_sprom_register_fallbacks(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (bcm47xx_sprom_registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) if (ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom_ssb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) pr_warn("Failed to register ssb SPROM handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) #if IS_BUILTIN(CONFIG_BCMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (bcma_arch_register_fallback_sprom(&bcm47xx_get_sprom_bcma))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) pr_warn("Failed to register bcma SPROM handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) bcm47xx_sprom_registered = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) fs_initcall(bcm47xx_sprom_register_fallbacks);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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