^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * extcon-rt8973a.c - Richtek RT8973A extcon driver to support USB switches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2014 Samsung Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Chanwoo Choi <cw00.choi@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/extcon-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "extcon-rt8973a.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DELAY_MS_DEFAULT 20000 /* unit: millisecond */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct muic_irq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct reg_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) bool invert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct rt8973a_muic_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct extcon_dev *edev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct regmap_irq_chip_data *irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct muic_irq *muic_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int num_muic_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) bool irq_attach;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) bool irq_detach;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) bool irq_ovp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) bool irq_otp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct work_struct irq_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct reg_data *reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned int num_reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bool auto_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Use delayed workqueue to detect cable state and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * notify cable state to notifiee/platform through uevent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * After completing the booting of platform, the extcon provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * driver should notify cable state to upper layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct delayed_work wq_detcable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Default value of RT8973A register to bring up MUIC device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static struct reg_data rt8973a_reg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .reg = RT8973A_REG_CONTROL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .mask = RT8973A_REG_CONTROL1_ADC_EN_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) | RT8973A_REG_CONTROL1_USB_CHD_EN_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) | RT8973A_REG_CONTROL1_CHGTYP_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) | RT8973A_REG_CONTROL1_SWITCH_OPEN_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) | RT8973A_REG_CONTROL1_AUTO_CONFIG_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) | RT8973A_REG_CONTROL1_INTM_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .val = RT8973A_REG_CONTROL1_ADC_EN_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) | RT8973A_REG_CONTROL1_USB_CHD_EN_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) | RT8973A_REG_CONTROL1_CHGTYP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .invert = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* List of detectable cables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const unsigned int rt8973a_extcon_cable[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) EXTCON_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) EXTCON_USB_HOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) EXTCON_CHG_USB_SDP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) EXTCON_CHG_USB_DCP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) EXTCON_JIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) EXTCON_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* Define OVP (Over Voltage Protection), OTP (Over Temperature Protection) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) enum rt8973a_event_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) RT8973A_EVENT_ATTACH = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) RT8973A_EVENT_DETACH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) RT8973A_EVENT_OVP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) RT8973A_EVENT_OTP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Define supported accessory type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) enum rt8973a_muic_acc_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) RT8973A_MUIC_ADC_OTG = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) RT8973A_MUIC_ADC_AUDIO_SEND_END_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) RT8973A_MUIC_ADC_AUDIO_REMOTE_S1_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) RT8973A_MUIC_ADC_AUDIO_REMOTE_S2_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) RT8973A_MUIC_ADC_AUDIO_REMOTE_S3_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) RT8973A_MUIC_ADC_AUDIO_REMOTE_S4_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) RT8973A_MUIC_ADC_AUDIO_REMOTE_S5_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) RT8973A_MUIC_ADC_AUDIO_REMOTE_S6_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) RT8973A_MUIC_ADC_AUDIO_REMOTE_S7_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) RT8973A_MUIC_ADC_AUDIO_REMOTE_S8_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) RT8973A_MUIC_ADC_AUDIO_REMOTE_S9_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) RT8973A_MUIC_ADC_AUDIO_REMOTE_S10_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) RT8973A_MUIC_ADC_AUDIO_REMOTE_S11_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) RT8973A_MUIC_ADC_AUDIO_REMOTE_S12_BUTTON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) RT8973A_MUIC_ADC_RESERVED_ACC_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) RT8973A_MUIC_ADC_RESERVED_ACC_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) RT8973A_MUIC_ADC_RESERVED_ACC_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) RT8973A_MUIC_ADC_RESERVED_ACC_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) RT8973A_MUIC_ADC_RESERVED_ACC_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) RT8973A_MUIC_ADC_AUDIO_TYPE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) RT8973A_MUIC_ADC_PHONE_POWERED_DEV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) RT8973A_MUIC_ADC_UNKNOWN_ACC_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) RT8973A_MUIC_ADC_UNKNOWN_ACC_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) RT8973A_MUIC_ADC_TA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_OFF_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_ON_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) RT8973A_MUIC_ADC_UNKNOWN_ACC_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) RT8973A_MUIC_ADC_UNKNOWN_ACC_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_OFF_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_ON_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) RT8973A_MUIC_ADC_UNKNOWN_ACC_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) RT8973A_MUIC_ADC_OPEN = 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * The below accessories has same ADC value (0x1f).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * So, Device type1 is used to separate specific accessory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* |---------|--ADC| */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* | [7:5]|[4:0]| */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) RT8973A_MUIC_ADC_USB = 0x3f, /* | 001|11111| */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* List of supported interrupt for RT8973A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct muic_irq rt8973a_muic_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { RT8973A_INT1_ATTACH, "muic-attach" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { RT8973A_INT1_DETACH, "muic-detach" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { RT8973A_INT1_CHGDET, "muic-chgdet" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { RT8973A_INT1_DCD_T, "muic-dcd-t" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { RT8973A_INT1_OVP, "muic-ovp" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { RT8973A_INT1_CONNECT, "muic-connect" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { RT8973A_INT1_ADC_CHG, "muic-adc-chg" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { RT8973A_INT1_OTP, "muic-otp" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { RT8973A_INT2_UVLO, "muic-uvlo" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { RT8973A_INT2_POR, "muic-por" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { RT8973A_INT2_OTP_FET, "muic-otp-fet" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { RT8973A_INT2_OVP_FET, "muic-ovp-fet" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { RT8973A_INT2_OCP_LATCH, "muic-ocp-latch" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { RT8973A_INT2_OCP, "muic-ocp" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) { RT8973A_INT2_OVP_OCP, "muic-ovp-ocp" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Define interrupt list of RT8973A to register regmap_irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const struct regmap_irq rt8973a_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* INT1 interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { .reg_offset = 0, .mask = RT8973A_INT1_ATTACH_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { .reg_offset = 0, .mask = RT8973A_INT1_DETACH_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { .reg_offset = 0, .mask = RT8973A_INT1_CHGDET_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { .reg_offset = 0, .mask = RT8973A_INT1_DCD_T_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { .reg_offset = 0, .mask = RT8973A_INT1_OVP_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { .reg_offset = 0, .mask = RT8973A_INT1_CONNECT_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { .reg_offset = 0, .mask = RT8973A_INT1_ADC_CHG_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { .reg_offset = 0, .mask = RT8973A_INT1_OTP_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* INT2 interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { .reg_offset = 1, .mask = RT8973A_INT2_UVLOT_MASK,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { .reg_offset = 1, .mask = RT8973A_INT2_POR_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) { .reg_offset = 1, .mask = RT8973A_INT2_OTP_FET_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { .reg_offset = 1, .mask = RT8973A_INT2_OVP_FET_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { .reg_offset = 1, .mask = RT8973A_INT2_OCP_LATCH_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { .reg_offset = 1, .mask = RT8973A_INT2_OCP_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { .reg_offset = 1, .mask = RT8973A_INT2_OVP_OCP_MASK, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const struct regmap_irq_chip rt8973a_muic_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .name = "rt8973a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .status_base = RT8973A_REG_INT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .mask_base = RT8973A_REG_INTM1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .mask_invert = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .num_regs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .irqs = rt8973a_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .num_irqs = ARRAY_SIZE(rt8973a_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* Define regmap configuration of RT8973A for I2C communication */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static bool rt8973a_muic_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) case RT8973A_REG_INTM1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) case RT8973A_REG_INTM2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static const struct regmap_config rt8973a_muic_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .volatile_reg = rt8973a_muic_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .max_register = RT8973A_REG_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Change DM_CON/DP_CON/VBUSIN switch according to cable type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int rt8973a_muic_set_path(struct rt8973a_muic_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) unsigned int con_sw, bool attached)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * Don't need to set h/w path according to cable type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * if Auto-configuration mode of CONTROL1 register is true.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (info->auto_config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!attached)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) con_sw = DM_DP_SWITCH_UART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) switch (con_sw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) case DM_DP_SWITCH_OPEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) case DM_DP_SWITCH_USB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) case DM_DP_SWITCH_UART:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = regmap_update_bits(info->regmap, RT8973A_REG_MANUAL_SW1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) RT8973A_REG_MANUAL_SW1_DP_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) RT8973A_REG_MANUAL_SW1_DM_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) con_sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev_err(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) "cannot update DM_CON/DP_CON switch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dev_err(info->dev, "Unknown DM_CON/DP_CON switch type (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) con_sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int rt8973a_muic_get_cable_type(struct rt8973a_muic_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) unsigned int adc, dev1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int ret, cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /* Read ADC value according to external cable or button */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ret = regmap_read(info->regmap, RT8973A_REG_ADC, &adc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) dev_err(info->dev, "failed to read ADC register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) cable_type = adc & RT8973A_REG_ADC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* Read Device 1 reigster to identify correct cable type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ret = regmap_read(info->regmap, RT8973A_REG_DEV1, &dev1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_err(info->dev, "failed to read DEV1 register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) switch (adc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) case RT8973A_MUIC_ADC_OPEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (dev1 & RT8973A_REG_DEV1_USB_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) cable_type = RT8973A_MUIC_ADC_USB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) else if (dev1 & RT8973A_REG_DEV1_DCPORT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) cable_type = RT8973A_MUIC_ADC_TA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) cable_type = RT8973A_MUIC_ADC_OPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static int rt8973a_muic_cable_handler(struct rt8973a_muic_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) enum rt8973a_event_type event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static unsigned int prev_cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) unsigned int con_sw = DM_DP_SWITCH_UART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) int ret, cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) bool attached = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) switch (event) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) case RT8973A_EVENT_ATTACH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) cable_type = rt8973a_muic_get_cable_type(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) attached = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case RT8973A_EVENT_DETACH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) cable_type = prev_cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) attached = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) case RT8973A_EVENT_OVP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) case RT8973A_EVENT_OTP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) dev_warn(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) "happen Over %s issue. Need to disconnect all cables\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) event == RT8973A_EVENT_OVP ? "Voltage" : "Temperature");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) cable_type = prev_cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) attached = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) dev_err(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) "Cannot handle this event (event:%d)\n", event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) prev_cable_type = cable_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) switch (cable_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) case RT8973A_MUIC_ADC_OTG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) id = EXTCON_USB_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) con_sw = DM_DP_SWITCH_USB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) case RT8973A_MUIC_ADC_TA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) id = EXTCON_CHG_USB_DCP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) con_sw = DM_DP_SWITCH_OPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) case RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_OFF_USB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) case RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_ON_USB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) id = EXTCON_JIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) con_sw = DM_DP_SWITCH_USB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) case RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_OFF_UART:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) case RT8973A_MUIC_ADC_FACTORY_MODE_BOOT_ON_UART:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) id = EXTCON_JIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) con_sw = DM_DP_SWITCH_UART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) case RT8973A_MUIC_ADC_USB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) id = EXTCON_USB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) con_sw = DM_DP_SWITCH_USB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) case RT8973A_MUIC_ADC_OPEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) case RT8973A_MUIC_ADC_UNKNOWN_ACC_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) case RT8973A_MUIC_ADC_UNKNOWN_ACC_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) case RT8973A_MUIC_ADC_UNKNOWN_ACC_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) case RT8973A_MUIC_ADC_UNKNOWN_ACC_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) case RT8973A_MUIC_ADC_UNKNOWN_ACC_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) dev_warn(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) "Unknown accessory type (adc:0x%x)\n", cable_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) case RT8973A_MUIC_ADC_AUDIO_SEND_END_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S1_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S2_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S3_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S4_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S5_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S6_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S7_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S8_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S9_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S10_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S11_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case RT8973A_MUIC_ADC_AUDIO_REMOTE_S12_BUTTON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) case RT8973A_MUIC_ADC_AUDIO_TYPE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) dev_warn(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) "Audio device/button type (adc:0x%x)\n", cable_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) case RT8973A_MUIC_ADC_RESERVED_ACC_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) case RT8973A_MUIC_ADC_RESERVED_ACC_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) case RT8973A_MUIC_ADC_RESERVED_ACC_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) case RT8973A_MUIC_ADC_RESERVED_ACC_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) case RT8973A_MUIC_ADC_RESERVED_ACC_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case RT8973A_MUIC_ADC_PHONE_POWERED_DEV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) dev_err(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) "Cannot handle this cable_type (adc:0x%x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) cable_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* Change internal hardware path(DM_CON/DP_CON) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ret = rt8973a_muic_set_path(info, con_sw, attached);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* Change the state of external accessory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) extcon_set_state_sync(info->edev, id, attached);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (id == EXTCON_USB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) extcon_set_state_sync(info->edev, EXTCON_CHG_USB_SDP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) attached);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static void rt8973a_muic_irq_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct rt8973a_muic_info *info = container_of(work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct rt8973a_muic_info, irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (!info->edev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) mutex_lock(&info->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) /* Detect attached or detached cables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (info->irq_attach) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ret = rt8973a_muic_cable_handler(info, RT8973A_EVENT_ATTACH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) info->irq_attach = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (info->irq_detach) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) ret = rt8973a_muic_cable_handler(info, RT8973A_EVENT_DETACH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) info->irq_detach = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (info->irq_ovp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) ret = rt8973a_muic_cable_handler(info, RT8973A_EVENT_OVP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) info->irq_ovp = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (info->irq_otp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ret = rt8973a_muic_cable_handler(info, RT8973A_EVENT_OTP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) info->irq_otp = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(info->dev, "failed to handle MUIC interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) mutex_unlock(&info->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static irqreturn_t rt8973a_muic_irq_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) struct rt8973a_muic_info *info = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) int i, irq_type = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) for (i = 0; i < info->num_muic_irqs; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (irq == info->muic_irqs[i].virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) irq_type = info->muic_irqs[i].irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) switch (irq_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) case RT8973A_INT1_ATTACH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) info->irq_attach = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) case RT8973A_INT1_DETACH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) info->irq_detach = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) case RT8973A_INT1_OVP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) info->irq_ovp = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) case RT8973A_INT1_OTP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) info->irq_otp = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) case RT8973A_INT1_CHGDET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) case RT8973A_INT1_DCD_T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) case RT8973A_INT1_CONNECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) case RT8973A_INT1_ADC_CHG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) case RT8973A_INT2_UVLO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) case RT8973A_INT2_POR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) case RT8973A_INT2_OTP_FET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) case RT8973A_INT2_OVP_FET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) case RT8973A_INT2_OCP_LATCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) case RT8973A_INT2_OCP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) case RT8973A_INT2_OVP_OCP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) dev_dbg(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) "Cannot handle this interrupt (%d)\n", irq_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) schedule_work(&info->irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static void rt8973a_muic_detect_cable_wq(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) struct rt8973a_muic_info *info = container_of(to_delayed_work(work),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) struct rt8973a_muic_info, wq_detcable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /* Notify the state of connector cable or not */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) ret = rt8973a_muic_cable_handler(info, RT8973A_EVENT_ATTACH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) dev_warn(info->dev, "failed to detect cable state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static void rt8973a_init_dev_type(struct rt8973a_muic_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) unsigned int data, vendor_id, version_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* To test I2C, Print version_id and vendor_id of RT8973A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ret = regmap_read(info->regmap, RT8973A_REG_DEVICE_ID, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) dev_err(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) "failed to read DEVICE_ID register: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) vendor_id = ((data & RT8973A_REG_DEVICE_ID_VENDOR_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) RT8973A_REG_DEVICE_ID_VENDOR_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) version_id = ((data & RT8973A_REG_DEVICE_ID_VERSION_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) RT8973A_REG_DEVICE_ID_VERSION_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) dev_info(info->dev, "Device type: version: 0x%x, vendor: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) version_id, vendor_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) /* Initiazle the register of RT8973A device to bring-up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) for (i = 0; i < info->num_reg_data; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) u8 reg = info->reg_data[i].reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) u8 mask = info->reg_data[i].mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) u8 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (info->reg_data[i].invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) val = ~info->reg_data[i].val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) val = info->reg_data[i].val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) regmap_update_bits(info->regmap, reg, mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) /* Check whether RT8973A is auto switching mode or not */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ret = regmap_read(info->regmap, RT8973A_REG_CONTROL1, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) dev_err(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) "failed to read CONTROL1 register: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) data &= RT8973A_REG_CONTROL1_AUTO_CONFIG_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) info->auto_config = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) dev_info(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) "Enable Auto-configuration for internal path\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static int rt8973a_muic_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct device_node *np = i2c->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) struct rt8973a_muic_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) int i, ret, irq_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) info = devm_kzalloc(&i2c->dev, sizeof(*info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) i2c_set_clientdata(i2c, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) info->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) info->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) info->irq = i2c->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) info->muic_irqs = rt8973a_muic_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) info->num_muic_irqs = ARRAY_SIZE(rt8973a_muic_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) info->reg_data = rt8973a_reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) info->num_reg_data = ARRAY_SIZE(rt8973a_reg_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) mutex_init(&info->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) INIT_WORK(&info->irq_work, rt8973a_muic_irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) info->regmap = devm_regmap_init_i2c(i2c, &rt8973a_muic_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (IS_ERR(info->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ret = PTR_ERR(info->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) dev_err(info->dev, "failed to allocate register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) /* Support irq domain for RT8973A MUIC device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) irq_flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT | IRQF_SHARED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ret = regmap_add_irq_chip(info->regmap, info->irq, irq_flags, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) &rt8973a_muic_irq_chip, &info->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) dev_err(info->dev, "failed to add irq_chip (irq:%d, err:%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) info->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) for (i = 0; i < info->num_muic_irqs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) struct muic_irq *muic_irq = &info->muic_irqs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) int virq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) virq = regmap_irq_get_virq(info->irq_data, muic_irq->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (virq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) muic_irq->virq = virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) ret = devm_request_threaded_irq(info->dev, virq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) rt8973a_muic_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) IRQF_NO_SUSPEND | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) muic_irq->name, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dev_err(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "failed: irq request (IRQ: %d, error :%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) muic_irq->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* Allocate extcon device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) info->edev = devm_extcon_dev_allocate(info->dev, rt8973a_extcon_cable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (IS_ERR(info->edev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_err(info->dev, "failed to allocate memory for extcon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* Register extcon device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) ret = devm_extcon_dev_register(info->dev, info->edev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) dev_err(info->dev, "failed to register extcon device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * Detect accessory after completing the initialization of platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * - Use delayed workqueue to detect cable state and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) * notify cable state to notifiee/platform through uevent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) * After completing the booting of platform, the extcon provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) * driver should notify cable state to upper layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) INIT_DELAYED_WORK(&info->wq_detcable, rt8973a_muic_detect_cable_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) queue_delayed_work(system_power_efficient_wq, &info->wq_detcable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) msecs_to_jiffies(DELAY_MS_DEFAULT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) /* Initialize RT8973A device and print vendor id and version id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) rt8973a_init_dev_type(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static int rt8973a_muic_i2c_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) struct rt8973a_muic_info *info = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) regmap_del_irq_chip(info->irq, info->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static const struct of_device_id rt8973a_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) { .compatible = "richtek,rt8973a-muic" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) MODULE_DEVICE_TABLE(of, rt8973a_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static int rt8973a_muic_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) struct rt8973a_muic_info *info = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) enable_irq_wake(info->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static int rt8973a_muic_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) struct rt8973a_muic_info *info = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) disable_irq_wake(info->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) static SIMPLE_DEV_PM_OPS(rt8973a_muic_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) rt8973a_muic_suspend, rt8973a_muic_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static const struct i2c_device_id rt8973a_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) { "rt8973a", TYPE_RT8973A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) MODULE_DEVICE_TABLE(i2c, rt8973a_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) static struct i2c_driver rt8973a_muic_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) .name = "rt8973a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .pm = &rt8973a_muic_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) .of_match_table = rt8973a_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .probe = rt8973a_muic_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) .remove = rt8973a_muic_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) .id_table = rt8973a_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static int __init rt8973a_muic_i2c_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return i2c_add_driver(&rt8973a_muic_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) subsys_initcall(rt8973a_muic_i2c_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) MODULE_DESCRIPTION("Richtek RT8973A Extcon driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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